參數(shù)資料
型號： AM79C960KCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnetTM-ISA Single-Chip Ethernet Controller
中文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120
封裝： PLASTIC, QFP-120
文件頁數(shù)： 69/127頁
文件大?。?/td> 814K
代理商： AM79C960KCW
P R E L I M I N A R Y
AMD
1-411
Am79C960
CSR50-51: Temporary Storage
Bit
Name
Description
31-0
TMP1
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR52-53: Temporary Storage
Bit
Name
Description
31-0
TMP2
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR54-55: Temporary Storage
Bit
Name
Description
31-0
TMP3
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR56-57: Temporary Storage
Bit
Name
Description
31-0
TMP4
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR58-59: Temporary Storage
Bit
Name
Description
31-0
TMP5
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR60-61: Previous Transmit Descriptor Address
Bit
Name
Description
31-24
RES
Reserved locations. Written as
zero and read as undefined.
Contains the previous TDRE ad-
dress pointer. The PCnet-ISA
controller has the capability to
stack multiple transmit frames.
Read/write accessible only when
STOP bit is set.
23-0
PXDA
CSR62-63: Previous Transmit Status and Byte
Count
Bit
Name
Description
31-24
PXST
Previous Transmit Status. This
field is a copy of bits 15:8 of
TMD1 of the previous transmit
descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD2 of the previous
transmit descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
11-0
PXBC
CSR64-65: Next Transmit Buffer Address
Bit
Name
Description
31-24
RES
Reserved locations. Written as
zero and read as undefined.
Contains the next transmit buffer
address
from
PCnet-ISA controller will transmit
an outgoing frame.
Read/write accessible only when
STOP bit is set.
23-0
NXBA
which
the
CSR66-67: Next Transmit Status and Byte Count
Bit
Name
Description
31-24
NXST
Next Transmit Status. This field
is a copy of bits 15:8 of TMD1 of
the next transmit descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
Next Transmit Byte Count. This
field is a copy of the BCNT field of
TMD2 of the next transmit
descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
11-0
NXBC
相關(guān)PDF資料
PDF描述
AM79C961AKCW PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKC PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961A PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKIW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AVCW PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C961 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA
AM79C961/AM79C961A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF)
AM79C961A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
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