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| 型號(hào)： | AM7968 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| 中文描述： | TAXIchip集成電路（透明異步Xmitter，接收器接口） |
| 文件頁(yè)數(shù)： | 117/127頁(yè) |
| 文件大小： | 730K |
| 代理商： | AM7968 |
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AMD
113
TAXIchip Integrated Circuits Technical Manual
active High, without any additional logic. The VLTN signal is used for both Command
and Data violations. Buffering of the DSTRB and VLTN signals may be necessary as
illustrated in Figure 15 to meet the drive requirements of the first column of registers.
Data/Command Output Note:
In this system, when a nonSync Command byte is received the data line values
corresponding to that byte will change to the values last output from the TAXI Receiver
data lines. Conversely, when a data byte is received the command line values for that
byte will change to the values last output from the TAXI Receiver command lines. This is
a characteristic of the example given and depends on how the command and data
information is latched.
Altering the Number of Output Bytes:
The above described design is an example of a four byte cascaded serial data receiving
system. The same design techniques can be used to expand or reduce the number of
bytes output at a time by the system. The considerations that should be taken into
account for an altered system deal with board space and part cost in accordance with
the requirements of the situation at hand. For board space note see the PAL Usage
section below.
PAL Usage:
In this system, the use of a PAL could greatly reduce the amount of board space used.
The PAL could incorporate all of the flip-flops and buffering logic as well as the first
column of registers that capture the system information. The reason a PAL was not
used in the system described above was to help ensure the understanding of the design
concept. For this application it is recommended that the timing considerations men-
tioned before should be investigated to ensure proper operation of the system.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM7968-125VBXA | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-125VBXA | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-125LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7969-125LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-175LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM7968/AM7969 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am7968/Am7969 - TAXIchip Integrated Circuits: Transparent Asynchronous Transmitter/Receiver Interface |
| AM7968-100/B3A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-100/BXA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-100DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
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