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Am75PDL191BHHa/Am75PDL193BHHa
February 6, 2004
A D V A N C E I N F O R M A T I O N
HARDWARE FEATURES
■
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or erase
cycle completion
■
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array data
■
WP#/ACC (Write Protect/Acceleration) input
— At V
IL
, hardware level protection for the first and last two 4K
word sectors.
— At V
IH
, allows removal of sector protection
— At V
, provides accelerated programming in a factory
setting
■
Persistent Sector Protection
— A command sector protection method to lock combinations
of individual sectors and sector groups to prevent program or
erase operations within that sector
— Sectors can be locked and unlocked in-system at V
CC
level
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector using
a user-defined 64-bit password
■
FOR CODE OR DATA STORAGE:
AM29DL640H
■
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in another bank.
— Zero latency between read and write operations
■
Flexible Bank
TM
architecture
— Read may occur in any of the three banks not being
written or erased.
— Four banks may be grouped by customer to achieve
desired bank divisions.
■
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
■
Manufactured on 0.13 μm process technology
■
SecSi (Secured Silicon) Sector: Extra 256 Byte
sector
— Factory locked and identifiable:16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
— Customer lockable:One-time programmable only.
Once locked, data cannot be changed
■
Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
■
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
PERFORMANCE CHARACTERISTICS
■
High performance
— Access time as fast as 70 ns
— Program time: 4 μs/word typical utilizing Accelerate
function
■
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
■
Minimum 1 million erase cycles guaranteed per
sector
■
20 year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
■
Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
— Eases historical sector erase flash limitations
■
Supports Common Flash Memory Interface (CFI)
■
Erase Suspend/Erase Resume
— Suspends erase operations to allow reading from
other sectors in same bank
■
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
■
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
■
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
■
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
■
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1,
140, and 141, regardless of sector protect status
— Acceleration (ACC) function accelerates program
timing
■
Sector protection
— Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system