參數(shù)資料
型號： AM70PDL129CDH66IS
廠商： SPANSION LLC
元件分類： 存儲(chǔ)器
英文描述： Stacked Multi-Chip Package (MCP/XIP) Flash Memory, Data storage MirrorBit Flash, and pSRAM (XIP)
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA93
封裝： 13 X 9 MM, FBGA-93
文件頁數(shù)： 115/127頁
文件大?。?/td> 846K
代理商： AM70PDL129CDH66IS
November 24, 2003
Am70PDL127CDH/Am70PDL129CDH
113
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. Word/Byte programming specification is based upon a single word/byte programming operation not utilizing the write buffer.
6. AC Specifications listed are tested with V
IO
= V
CC
. Contact AMD for information on AC operation with V
IO
≠
V
CC
.
Parameter
All Speed Options
JEDEC
Std.
Description
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
110
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit
polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
352
μs
Effective Write Buffer Program
Operation (Notes 2, 4)
Per Byte
Typ
11
μs
Per Word
Typ
22
μs
Accelerated Effective Write Buffer
Program Operation (Notes 2, 4)
Per Byte
Typ
8.8
μs
Per Word
Typ
17.6
μs
Single Word/Byte Program
Operation (Note 2, 5)
Byte
Typ
100
μs
Word
100
Single Word/Byte Accelerated
Programming Operation (Note 2, 5)
Byte
Typ
90
Word
90
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
t
VHH
V
HH
Rise and Fall Time (Note 1)
Min
250
ns
t
VCS
V
CC
Setup Time (Note 1)
Min
50
μs
t
BUSY
WE# High to RY/BY# Low
Min
110
ns
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