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| 型號： | AM29PDL128G |
| 廠商： | Spansion Inc. |
| 英文描述： | High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-CDIP -55 to 125 |
| 中文描述： | 128兆位（8米× 16位/ 4米× 32位），3.0伏的CMOS只，同步讀/寫閃存與VersatileIO控制記憶 |
| 文件頁數(shù)： | 2/69頁 |
| 文件大?。?/td> | 1181K |
| 代理商： | AM29PDL128G |
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PRELIMINARY
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
Publication#
25685
Issue Date:
July 29, 2002
Rev:
B
Amendment/
+2
Am29PDL128G
128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous
Read/ Write Flash Memory with VersatileIO
TM
Control
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
I
128Mbit Page Mode device
— Word (16-bit) or double word (32-bit) mode selectable via
WORD# input
— Page size of 8 words/4 double words: Fast page read access
from random locations within the page
I
Single power supply operation
— Full Voltage range: 2.7 to 3.6 volt read, erase, and program
operations for battery-powered applications
I
Simultaneous Read/Write Operation
— Data can be continuously read from one bank while
executing erase/program functions in another bank
— Zero latency switching from write to read operations
I
FlexBank Architecture
— 4 separate banks, with up to two simultaneous operations
per device
— Organized as two 16 Mbit banks (Bank 1 & 4) and two 48
Mbit banks (Bank 2 & 3)
VersatileI/O
TM
(V
IO
) Control
— Output voltage generated and input voltages tolerated on the
device is determined by the voltage on the V
IO
pin
SecSi (Secured Silicon) Sector region
— 128 words (64 double words) accessible through a
command sequence
I
I
I
Both top and bottom boot blocks in one device
I
Manufactured on 0.17 μm process technology
I
20-year data retention at 125°C
I
Minimum 1 million write cycle guarantee per sector
PERFORMANCE CHARACTERISTICS
I
High Performance
—
Page access times as fast as 25 ns
—
Random access times as fast as 70 ns
I
Power consumption (typical values at 10 MHz)
—
38 mA active read current
—
17 mA program/erase current
—
1.5 μA typical standby mode current
SOFTWARE FEATURES
I
Software command-set compatible with JEDEC 42.4
standard
—
Backward compatible with Am29F and Am29LV families
I
CFI (Common Flash Interface) complaint
—
Provides device-specific information to the system, allowing
host software to easily reconfigure for different Flash devices
I
Erase Suspend / Erase Resume
—
Suspends an erase operation to allow read or program
operations in other sectors of same bank
I
Unlock Bypass Program command
—
Reduces overall programming time when issuing multiple
program command sequences
HARDWARE FEATURES
I
Ready/Busy# pin (RY/BY#)
—
Provides a hardware method of detecting program or erase
cycle completion
I
Hardware reset pin (RESET#)
—
Hardware method to reset the device to reading array data
I
WP# (Write Protect) input
—
At V
, protects the two top and two bottom sectors,
regardless of sector protect/unprotect status
—
At V
IH
, allows removal of sector protection
—
An internal pull up to Vcc is provided
I
Persistent Sector Protection
—
A command sector protection method to lock combinations
of individual sectors and sector groups to prevent program or
erase operations within that sector
—
Sectors can be locked and unlocked in-system at V
CC
level
Password Sector Protection
—
A sophisticated sector protection method to lock
combinations of individual sectors and sector groups to
prevent program or erase operations within that sector using
a user-defined 64-bit password
I
I
ACC (Acceleration) input provides faster programming
times in a factory setting
I
Package options
—
80-ball Fortified BGA
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