參數(shù)資料
型號(hào)： Am29PDL128G80
廠商： Spansion Inc.
英文描述： 128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control
中文描述： 128兆位（8米× 16位/ 4米× 32位），3.0伏的CMOS只，同步讀/寫閃存與VersatileIO控制記憶
文件頁數(shù)： 44/69頁
文件大小： 1181K
代理商： AM29PDL128G80
July 29, 2002
Am29PDL128G
43
P R E L I M I N A R Y
Legend:
BA = Address of bank switching to autoselect mode, bypass mode, or
erase. Determined by A21:A19, see Tables
4
and
5
for more detail.
PA = Program Address (A21:A-1). Addresses latch on falling edge of
WE# or CE# pulse, whichever happens later.
PD = Program Data (DQ15:DQ0) written to location PA. Data latches
on rising edge of WE# or CE# pulse, whichever happens first.
RA = Read Address (A21:A-1).
RD = Read Data (DQ15:DQ0) from location RA.
SA = Sector Address (A21:A12) for verifying (in autoselect mode) or
erasing.
WD = Write Data. See
“
Configuration Register
”
definition for specific
write data. Data latched on rising edge of WE#.
X = Don
’
t care
Notes:
1.
2.
3.
See
Table 1
for description of bus operations.
All values are in hexadecimal.
Shaded cells in table denote read cycles. All other cycles are
write operations.
During unlock and command cycles, when lower address bits are
555 or AAAh as shown in table, address bits higher than A11
(except where BA is required) and data bits higher than DQ7 are
don
’
t cares.
No unlock or command cycles required when bank is reading
array data.
Reset command is required to return to reading array (or to
erase-suspend-read mode if previously in Erase Suspend) when
a bank is in autoselect mode, or if DQ5 goes high (while bank is
providing status information).
Cycle 4 of autoselect command sequence is a read cycle. See
Autoselect Command Sequence
section for more information.
The data is 80h for factory locked and 00h for not factory locked.
4.
5.
6.
7.
8.
9.
The data is 00h for an unprotected sector group and 01h for a
protected sector group.
10. Device ID must be read across cycles 4, 5, and 6.
11. System may read and program in non-erasing sectors, or enter
autoselect mode, when in Program/Erase Suspend mode.
Program/Erase Suspend command valid only during a sector
erase operation, and requires bank address.
12. Program/Erase Resume command valid only during Erase
Suspend mode, and requires bank address.
13. Command is valid when device is ready to read array data or
when device is in autoselect mode.
14. ACC must be at V
ID
during entire operation of this command.
15. Command ignored during any Embedded Program, Embedded
Erase, or Suspend operation.
16. Unlock Bypass Entry command required prior to any Unlock
Bypass operation.
Unlock Bypass Reset command is required to
return to reading array.
Table 16.
Memory Array Command Definitions (x16 Mode)
Command (Notes)
1
1
4
6
Bus Cycles (Notes 1
–
4)
Addr Data Addr Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (5)
Reset (6)
RA
XXX
555
555
RD
F0
AA
AA
Autoselect
(Note 7)
Manufacturer ID
Device ID (10)
2AA
2AA
55
55
555
555
90
90
(BA)X00
(BA)X01
01
7E
(see
Note
8)
XX00/
XX01
PD
AA
AA
(BA)X0E
0D
(BA)X0F
00
SecSi Sector Factory
Protect
4
555
AA
2AA
55
555
90
X03
Sector Group Protect
Verify (9)
4
555
AA
2AA
55
555
90
SA02
Program
Chip Erase
Sector Erase
Program/Erase Suspend (11)
Program/Erase Resume (12)
CFI Query (13)
Accelerated Program (15)
Configuration Register Verify
Configuration Register Write (16)
Unlock Bypass Entry (17)
Unlock Bypass Program (17)
Unlock Bypass Erase (17)
Unlock Bypass CFI (13, 17)
Unlock Bypass Reset (17)
4
6
6
1
1
1
2
4
4
3
2
2
1
2
555
AAA
AAA
BA
BA
55
XX
AAA
AAA
AAA
XX
XX
XX
XX
AA
AA
AA
B0
30
98
A0
AA
AA
AA
A0
80
98
90
2AA
555
555
55
55
55
555
AAA
AAA
90
80
80
PA
AAA
AAA
555
555
55
55
AAA
SA
10
30
PA
555
555
555
PA
XX
PD
55
55
55
PD
10
(BA)AAA
AAA
AAA
C6
D0
20
(BA)XX
XX
RD
WD
XX
00
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