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參數(shù)資料
| 型號： | AM29LV2562MH120RPII |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control |
| 中文描述： | 16M X 32 FLASH 3V PROM, 120 ns, PBGA80 |
| 封裝： | 18 X 12 MM, FBGA-80 |
| 文件頁數(shù)： | 63/69頁 |
| 文件大?。?/td> | 1451K |
| 代理商： | AM29LV2562MH120RPII |
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October 9, 2003
Am29LV2562M
61
P R E L I M I N A R Y
AC CHARACTERISTICS
Alternate CE# Controlled Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
3. For 1–16 doublewords/1–32 words programmed.
4. Effective write buffer specification is based upon a 16-doubleword/32-word write buffer operation.
5. AC specifications listed are tested with V
IO
= V
CC
. Contact AMD for information on AC operation when V
IO
≠
V
CC
.
Parameter
120R
JEDEC
Std.
Description
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ELAX
t
AH
Address Hold Time
Min
45
ns
t
DVEH
t
DS
Data Setup Time
Min
45
ns
t
EHDX
t
DH
Data Hold Time
Min
0
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time
Min
0
ns
t
EHWH
t
WH
WE# Hold Time
Min
0
ns
t
ELEH
t
CP
CE# Pulse Width
Min
45
ns
t
EHEL
t
CPH
CE# Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
μs
Effective Write Buffer Program
Operation (Notes 2, 4)
Per Word
Typ
7.5
μs
Per Doubleword
Typ
15
μs
Effective Accelerated Write Buffer
Program Operation (Notes 2, 4)
Per Word
Typ
6.25
μs
Per Doubleword
Typ
12.5
μs
Program Operation (Note 2)
Word
Typ
60
μs
Doubleword
Typ
60
μs
Accelerated Programming Operation
(Note 2)
Word
Typ
54
μs
Doubleword
Typ
54
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
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| AM29LV2562ML120RPII | 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control |
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