
12
Am29LV010B
22140D7 February 24, 2009
D A TA SH EET
Autoselect Mode
The autoselect mode provides manufacturer and
device identification, and sector protection verification,
through identifier codes output on DQ7–DQ0. This
mode is primarily intended for programming equipment
to automatically match a device to be programmed with
its corresponding programming algorithm. However,
the autoselect codes can also be accessed in-system
through the command register.
When using programming equipment, the autoselect
mode requires VID (11.5 V to 12.5 V) on address pin
A9. Address pins A6, A1, and A0 must be as shown in
Table 3. In addition, when verifying sector protection,
the sector address must appear on the appropriate
highest order address bits (see Table
2). When all nec-
essa r y bits ha v e bee n se t a s r equir ed, the
programming equipment may then read the corre-
sponding identifier code on DQ7-DQ0.
To access the autoselect codes in-system, the host
system can issue the autoselect command via the
command register, as shown in
Table 4. This method
details on using the autoselect mode.
Table 3.
Am29LV010B Autoselect Codes
L = Logic Low = VIL, H = Logic High = VIH, SA = Sector Address, X = Don’t care.
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both
program and erase operations in previously protected
sectors.
The method intended only for programming equipment
requires VID on address pin A9, and OE#. This method
is compatible with programmer routines written for
earlier 3.0 volt-only AMD flash devices. Publication
number 22134 contains further details; contact an
AMD representative to request a copy.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See “Autoselect Mode” for details.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadver tent writes (refer to
Table 4 for
command definitions). In addition, the following hard-
ware data protection measures prevent accidental
erasure or programming, which might otherwise be
caused by spurious system level signals during VCC
power-up and power-down transitions, or from system
noise.
Low VCC Write Inhibit
When VCC is less than VLKO, the device does not
accept any write cycles. This protects data during VCC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until VCC
is greater than VLKO. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when VCC is greater than VLKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
VIL, CE# = VIH or WE# = VIH. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a
logical one.
Description
CE#
OE#
WE#
A16
to
A14
A13
to
A10
A9
A8
to
A7
A6
A5
to
A2
A1
A0
DQ7
to
DQ0
Manufacturer ID: AMD
L
H
X
VID
X
L
X
L
01h
Device ID: Am29LV010B
L
H
X
VID
X
L
X
L
H
6Eh
Sector Protection Verification
L
H
SA
X
VID
X
L
X
H
L
01h
(protected)
00h
(unprotected)