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參數(shù)資料
| 型號(hào)： | AM29LV010B-55ED |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | Flash Memory IC; Leaded Process Compatible:Yes; Memory Size:10Mbit; Package/Case:32-TSOP; Peak Reflow Compatible (260 C):Yes; Supply Voltage Max:3V; Access Time, Tacc:55ns; Series:AM29 RoHS Compliant: Yes |
| 中文描述： | 128K X 8 FLASH 3V PROM, 55 ns, PDSO32 |
| 封裝： | LEAD FREE, MO-142BD, TSOP-32 |
| 文件頁數(shù)： | 26/37頁 |
| 文件大?。?/td> | 967K |
| 代理商： | AM29LV010B-55ED |
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32
Am29LV010B
22140D7 February 24, 2009
D A TA SH EET
AC CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°C, 3.0 V V
CC, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table 4 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
Parameter
Typ (Note 1)
Max (Note 3)
Unit
Comments
Sector Erase Time
0.7
15
s
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time (Note 2)
6
s
Byte Programming Time
9
300
s
Excludes system level
overhead (Note 5)
Chip Programming Time (Note 2)
1.1
3.3
s
tGHEL
tWS
OE#
CE#
WE#
tDS
Data
tAH
Addresses
tDH
tCP
DQ7#
DOUT
tWC
tAS
tCPH
PA
Data# Polling
A0 for program
55 for erase
tWHWH1 or 2
tWH
PD for program
30 for sector erase
10 for chip erase
555 for program
2AA for erase
PA for program
SA for sector erase
555 for chip erase
Notes:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at address PA.
3. DQ7 is the complement of the data written to the device.
4. DOUT is the data written to the device.
5. Figure indicates the last two bus cycles of the command sequence.
Figure 17.
Alternate CE# Controlled Write Operation Timings
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| AM29LV010B-55JCT | 制造商:Spansion 功能描述:1M (128KX8) 3V, UNIFORM SECTOR, PLCC32, COM, T&R - Tape and Reel |
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