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參數(shù)資料
| 型號(hào)： | AM29BDS643GT7MVAI |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44 |
| 封裝： | 9.20 X 8 MM, 0.50 MM PITCH, FBGA-44 |
| 文件頁(yè)數(shù)： | 9/49頁(yè) |
| 文件大?。?/td> | 382K |
| 代理商： | AM29BDS643GT7MVAI |
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May 8, 2006 25692A2
Am29BDS643G
7
D A T A S H E E T
INPUT/OUTPUT DESCRIPTIONS
A16–A21
=
Address Inputs
A/DQ0–
A/DQ15
=
Multiplexed Address/Data input/output
CE#
=
Chip Enable Input. Asynchronous
relative to CLK for the Burst mode.
OE#
=
Output Enable Input. Asynchronous
relative to CLK for the Burst mode.
WE#
=
Write Enable Input.
V
CC
V
SS
NC
=
Device Power Supply (1.7 V–1.9 V).
=
Ground
=
No Connect; not connected internally
RDY
=
Ready output; indicates the status of
the Burst read. Low = data not valid at
expected time. High = data valid.
CLK
=
The first rising edge of CLK in
conjunction with AVD# low latches
address input and activates burst
mode operation. After the initial word
is output, subsequent rising edges of
CLK increment the internal address
counter. CLK should remain low
during asynchronous access.
AVD#
=
Address Valid input. Indicates to
device that the valid address is
present on the address inputs
(address bits A0–A15 are multiplexed,
address bits A16–A21 are address
only).
Low = for asynchronous mode,
indicates valid address; for burst
mode, causes starting address to be
latched on rising edge of CLK.
High = device ignores address inputs
PS
=
Power Saving input/output
During a read operation, PS indicates
whether or not the data on the outputs
are inverted. Low = data not inverted;
High = data inverted
During write or command operations,
if the PS input is taken high the input
data will be inverted internally; if the
PS input is low the input data will not
be inverted internally
RESET#
=
Hardware reset input. Low = device
resets and returns to reading array
data
WP#
=
Hardware write protect input. Low =
disables writes to SA132 and SA133
V
PP
=
At 12 V, accelerates programming;
automatically places device in unlock
bypass mode. At V
IL
, disables
program and erase functions. Should
be at V
IH
for all other conditions.
LOGIC SYMBOL
6
16
A/DQ0–
A/DQ15
A16–A21
CE#
OE#
WE#
RESET#
CLK
RDY
PS
AVD#
WP#
V
PP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDS643GT5GVAI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| AM29BDS643GT5KVAI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| AM29BDS643GT5MVAI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| AM29BDS643GT7GVAI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| AM29BDS643GT7KVAI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
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