參數(shù)資料
型號(hào): AM29BDD160GB20CKE
廠商: Advanced Micro Devices, Inc.
英文描述: 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
中文描述: 16兆位(1 M中的x 16-bit/512畝× 32位),2.5伏的CMOS只突發(fā)模式,雙啟動(dòng),同步讀/寫(xiě)閃存
文件頁(yè)數(shù): 78/79頁(yè)
文件大?。?/td> 1368K
代理商: AM29BDD160GB20CKE
76
Am29BDD160G
June 7, 2006
S
ector Era
s
e and Pro
g
ram
S
u
s
pend Operat
i
on
Mechan
i
c
s
Added
bu
lleted
s
ect
i
on
.
Ab
s
olute Max
i
mum Rat
i
n
gs
and Operat
i
n
g
Ran
g
e
s
Added V
IO
Ch
a
nged 1
.
65 V to –0
.
5 V
Ch
a
nged 2
.3
V to 2
.
5 V
CMO
S
Compat
i
ble
Removed “V
IO
” from M
a
x col
u
mn of o
u
tp
u
t h
i
gh volt-
a
ge row
.
F
ig
ure 16
.
Bur
s
t Mode Read (x
3
2 mode)
Corrected typo
s
to
subs
cr
i
pt
s.
Corrected v
a
l
u
e
s
for the t
BACC
a
nd t
DIND
for the 54D,
65D, 64C,
a
nd
8
0C
s
peed opt
i
on
s.
F
ig
ure 17
.
A
s
ynchronou
s
Command Wr
i
te T
i
m
i
n
g
Added t
WC
a
nd t
WPH
.
F
ig
ure 1
8.
S
ynchronou
s
Command Wr
i
te/ Read
T
i
m
i
n
g
Added t
WC
a
nd t
WPH
.
Hardware Re
s
et (RE
S
ET#)
Corrected t
READY
m
a
x
.
F
ig
ure 20
.
WP# Wr
i
te T
i
m
i
n
g
Added t
WP
.
F
ig
ure 2
3.
Back-to-back Cycle T
i
m
i
n
gs
Added t
WPH
.
F
ig
ure 24
.
Data# Poll
i
n
g
T
i
m
i
n
gs
(Dur
i
n
g
Embedded Al
g
or
i
thm
s
)
Added t
WC
.
F
ig
ure 29
.
Alternate CE# Controlled Wr
i
te
Operat
i
on T
i
m
i
n
gs
Added t
WP
a
nd t
WPH
Era
s
e and Pro
g
ramm
i
n
g
Performance
Ch
a
nged the
s
ector er
as
e t
i
me typ
i
c
a
l to 1
.
0
.
Rev
isi
on B+5 (May 6, 200
3
)
Global
Converted d
a
t
a
s
heet from Adv
a
nced Inform
a
t
i
on to
Prel
i
m
i
n
a
ry
.
Order
i
n
g
Informat
i
on
Removed
s
ome OPN
s
a
nd m
a
rk
i
ng
s.
Automat
i
c
S
leep Mode (A
S
M) and
S
tandby Mode
Reworded f
i
r
s
t p
a
r
a
gr
a
ph
.
DQ7: Data# Poll
i
n
g
, DQ6: To
gg
le B
i
t I and DQ2:
To
gg
le B
i
t II
Added reference to F
i
g
u
re 27
.
Ab
s
olute Max
i
mum Rat
i
n
gs
Added ACC reference
.
CMO
S
Compat
i
ble
Corrected M
a
x v
a
l
u
e
s
for the I
CC5, 7,
a
nd
8
Added Note #5
.
F
ig
ure 27
.
S
ynchronou
s
Data Poll
i
n
g
T
i
m
i
n
gs
/To
gg
le B
i
t T
i
m
i
n
g
Added F
i
g
u
re
.
Si
multaneou
s
Read/Wr
i
te Operat
i
on
s
Overv
i
ew
and Re
s
tr
i
ct
i
on
s
Added
S
ect
i
on
s
a
nd t
ab
le
.
Table 7
.
Bur
s
t In
i
t
i
al Acce
ss
Delay, Table
8.
Conf
ig
urat
i
on Re
gis
ter Def
i
n
i
t
i
on
s
, Table 2
3.
Te
s
t
S
pec
i
f
i
cat
i
on
s
, A
s
ynchronou
s
Read Operat
i
on
s
,
and Bur
s
t Mode Read
Removed the 65D,
8
0C,
a
nd
9
0A
s
peed opt
i
on
s
from
t
ab
le
s.
Rev
isi
on C (May 19, 200
3
)
No rev
isi
on
s
m
a
de, repo
s
t on we
b.
Rev
isi
on C+1 (May 29, 200
3
)
D
is
t
i
nct
i
ve Character
is
t
i
c
s
Ch
a
nged the
s
t
a
nd
b
y mode to 60
μ
A
.
Product
S
elector Gu
i
de
Ch
a
nged the
s
t
a
nd
a
rd volt
a
ge r
a
nge to 2
.
5-2
.
75 V
Output D
is
able Mode
Repl
a
ce p
a
r
a
gr
a
ph
.
S
ynchronou
s
(Bur
s
t) Read Operat
i
on
Removed reference to “cont
i
n
u
o
us
s
e
qu
ent
ia
l” from
s
ect
i
on
.
F
ig
ure
3.
In
i
t
i
al Bur
s
t Delay Control
Ren
u
m
b
ered w
a
veform to re
a
d two, three, fo
u
r
.
To
gg
le B
i
t I
Added
s
entence to
s
econd p
a
r
a
gr
a
ph of
s
ect
i
on
.
CMO
S
Compat
i
ble
Removed reference to cont
i
n
u
o
us
bu
r
s
t from t
ab
le
.
Bur
s
t Mode Read
Ch
a
nged the t
IACC
M
a
x for the 65A
s
peed opt
i
on to 67
n
s.
相關(guān)PDF資料
PDF描述
AM29BDD160GB20CKF 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
AM29BDD160GB20CKI 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
AM29BDD160GB20CKK 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
AM29BDD160GB20CPBE 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
AM29BDD160GB20CPBF 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
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