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參數(shù)資料
| 型號： | AM29BDD160GB17CPBK |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動，同步讀/寫閃存 |
| 文件頁數(shù)： | 45/79頁 |
| 文件大小： | 1368K |
| 代理商： | AM29BDD160GB17CPBK |
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June 7, 2006
Am29BDD160G
43
lected (WORD# = 0)
.
Wr
i
t
i
ng the P
ass
word Unlock
comm
a
nd
is
a
ddre
ss
order
s
pec
i
f
i
c
.
In other word
s
, for
the x
3
2 d
a
t
a
bus
conf
i
g
u
r
a
t
i
on, the lower
3
2
bi
t
s
of the
p
ass
word
a
re wr
i
tten f
i
r
s
t
a
nd then the
u
pper
3
2
bi
t
s
of
the p
ass
word
a
re wr
i
tten
.
For the x16 d
a
t
a
bus
conf
i
g-
u
r
a
t
i
on, the lower
a
ddre
ss
A0
:
A
-1
= 00, the next P
ass
-
word Unlock comm
a
nd
is
to A0
:
A
-1
= 01, then to
A0
:
A
-1
= 10,
a
nd f
i
n
a
lly to A0
:
A
-1
= 11
.
Wr
i
t
i
ng o
u
t of
s
e-
qu
ence re
su
lt
s
i
n the P
ass
word Unlock not ret
u
rn
i
ng
a
m
a
tch w
i
th the p
ass
word
a
nd the PPB Lock B
i
t re-
m
ai
n
s
s
et
.
Once the P
ass
word Unlock comm
a
nd
is
entered, the
RDY/B
S
Y# p
i
n goe
s
LOW
i
nd
i
c
a
t
i
ng th
a
t the dev
i
ce
is
bus
y
.
Al
s
o, re
a
d
i
ng the
s
m
a
ll
ba
nk (25
%
ba
nk) re
su
lt
s
i
n the DQ6 p
i
n toggl
i
ng,
i
nd
i
c
a
t
i
ng th
a
t the P
ass
word
Unlock f
u
nct
i
on
is
i
n progre
ss.
Re
a
d
i
ng the l
a
rge
ba
nk
(75
%
ba
nk) ret
u
rn
s
a
ct
ua
l
a
rr
a
y d
a
t
a.
Approx
i
m
a
tely
1
uS
ec
is
re
qui
red for e
a
ch port
i
on of the
u
nlock
.
Once
the f
i
r
s
t port
i
on of the p
ass
word
u
nlock complete
s
(RDY/B
S
Y#
is
not dr
i
ven
a
nd DQ6 doe
s
not toggle
when re
a
d), the P
ass
word Unlock comm
a
nd
is
issu
ed
a
g
ai
n, only th
is
t
i
me w
i
th the next p
a
rt of the p
ass
-
word
.
If WORD# = 1, the
s
econd P
ass
word Unlock
comm
a
nd
is
the f
i
n
a
l comm
a
nd
b
efore the PPB Lock
B
i
t
is
cle
a
red (
assu
m
i
ng
a
v
a
l
i
d p
ass
word)
.
If WORD#
= 0, th
is
is
the fo
u
rth P
ass
word Unlock comm
a
nd
.
In
x16 mode, fo
u
r P
ass
word Unlock comm
a
nd
s
a
re re-
qui
red to
su
cce
ss
f
u
lly cle
a
r the PPB Lock B
i
t
.
A
s
w
i
th
the f
i
r
s
t P
ass
word Unlock comm
a
nd, the RY/BY#
si
g-
n
a
l goe
s
LOW
a
nd re
a
d
i
ng the dev
i
ce re
su
lt
s
i
n the
DQ6 p
i
n toggl
i
ng on
su
cce
ssi
ve re
a
d oper
a
t
i
on
s
u
nt
i
l
complete
.
It
is
the re
s
pon
sibi
l
i
ty of the m
i
croproce
ss
or
to keep tr
a
ck of the n
u
m
b
er of P
ass
word Unlock com-
m
a
nd
s
(2 for x
3
2
bus
a
nd 4 for x16
bus
), the order,
a
nd when to re
a
d the PPB Lock
bi
t to conf
i
rm
su
c-
ce
ss
f
u
l p
ass
word
u
nlock
The P
ass
word Unlock comm
a
nd
is
perm
i
tted
i
f the
S
ec
Si
s
ector
is
en
ab
led
.
PPB Pro
g
ram Command
The PPB Progr
a
m comm
a
nd
is
us
ed to progr
a
m, or
s
et,
a
g
i
ven PPB
.
E
a
ch PPB
is
i
nd
i
v
i
d
ua
lly pro-
gr
a
mmed (
bu
t
is
bu
lk er
as
ed w
i
th the other PPB
s
)
.
The
s
pec
i
f
i
c
s
ector
a
ddre
ss
(A1
8
–A11)
a
re wr
i
tten
a
t
the
sa
me t
i
me
as
the progr
a
m comm
a
nd 60h w
i
th A6
= 0
.
If the PPB Lock B
i
t
is
s
et
a
nd the corre
s
pond
i
ng
PPB
is
s
et for the
s
ector, the PPB Progr
a
m comm
a
nd
w
i
ll not exec
u
te
a
nd the comm
a
nd w
i
ll t
i
me-o
u
t w
i
tho
u
t
progr
a
mm
i
ng the PPB
.
The ho
s
t
s
y
s
tem m
us
t determ
i
ne whether
a
PPB h
as
b
een f
u
lly progr
a
mmed
b
y not
i
ng the
s
t
a
t
us
of DQ0
i
n
the
si
xth cycle of the PPB Progr
a
m comm
a
nd
.
If DQ0
= 0, the ent
i
re
si
x-cycle PPB Progr
a
m comm
a
nd
s
e-
qu
ence m
us
t
b
e re
issu
ed
u
nt
i
l DQ0 = 1
.
All PPB Era
s
e Command
The All PPB Er
as
e comm
a
nd
is
us
ed to er
as
e
a
ll
PPB
s
i
n
bu
lk
.
There
is
no me
a
n
s
for
i
nd
i
v
i
d
ua
lly er
as
-
i
ng
a
s
pec
i
f
i
c PPB
.
Unl
i
ke the PPB progr
a
m, no
s
pe-
c
i
f
i
c
s
ector
a
ddre
ss
is
re
qui
red
.
However, when the
PPB er
as
e comm
a
nd
is
wr
i
tten (60h)
a
nd A6 = 1,
a
ll
S
ector PPB
s
a
re er
as
ed
i
n p
a
r
a
llel
.
If the PPB Lock B
i
t
is
s
et the ALL PPB Er
as
e comm
a
nd w
i
ll not exec
u
te
a
nd the comm
a
nd w
i
ll t
i
me-o
u
t w
i
tho
u
t er
asi
ng the
PPB
s.
The ho
s
t
s
y
s
tem m
us
t determ
i
ne whether
a
ll
PPB h
as
b
een f
u
lly er
as
ed
b
y not
i
ng the
s
t
a
t
us
of DQ0
i
n the
si
xth cycle of the All PPB Er
as
e comm
a
nd
.
If
DQ0 = 1, the ent
i
re
si
x-cycle All PPB Er
as
e comm
a
nd
s
e
qu
ence m
us
t
b
e re
issu
ed
u
nt
i
l DQ0 = 1
.
It
is
the re
s
pon
sibi
l
i
ty of the
us
er to preprogr
a
m
a
ll
PPB
s
pr
i
or to
issui
ng the All PPB Er
as
e comm
a
nd
.
If
the
us
er
a
ttempt
s
to er
as
e
a
cle
a
red PPB, over-er
a
-
su
re m
a
y occ
u
r m
a
k
i
ng
i
t d
i
ff
i
c
u
lt to progr
a
m the PPB
a
t
a
l
a
ter t
i
me
.
Al
s
o note th
a
t the tot
a
l n
u
m
b
er of PPB
progr
a
m/er
as
e cycle
s
is
l
i
m
i
ted to 100 cycle
s.
Cycl
i
ng
the PPB
s
b
eyond 100 cycle
s
is
not g
ua
r
a
nteed
.
The All PPB Er
as
e comm
a
nd
is
perm
i
tted
i
f the
S
ec
Si
s
ector
is
en
ab
led
.
DYB Wr
i
te
The DYB Wr
i
te comm
a
nd
is
us
ed for
s
ett
i
ng the DYB,
wh
i
ch
is
a
vol
a
t
i
le
bi
t th
a
t
is
cle
a
red
a
t re
s
et
.
There
is
one DYB per
s
ector
.
If the PPB
is
s
et, the
s
ector
is
protected reg
a
rdle
ss
of the v
a
l
u
e of the DYB
.
If the
PPB
is
cle
a
red,
s
ett
i
ng the DYB to
a
1 protect
s
the
s
ector from progr
a
m
s
or er
as
e
s.
Si
nce th
is
is
a
vol
a
t
i
le
bi
t, remov
i
ng power or re
s
ett
i
ng the dev
i
ce w
i
ll cle
a
r
the DYB
s.
The
ba
nk
a
ddre
ss
is
l
a
tched when the com-
m
a
nd
is
wr
i
tten
.
The DYB Wr
i
te comm
a
nd
is
perm
i
tted
i
f the
S
ec
Si
s
ector
is
en
ab
led
.
PPB Lock B
i
t
S
et
The PPB Lock B
i
t
s
et comm
a
nd
is
us
ed for
s
ett
i
ng the
DYB, wh
i
ch
is
a
vol
a
t
i
le
bi
t th
a
t
is
cle
a
red
a
t re
s
et
.
There
is
one DYB per
s
ector
.
If the PPB
is
s
et, the
s
ector
is
protected reg
a
rdle
ss
of the v
a
l
u
e of the DYB
.
If the PPB
is
cle
a
red,
s
ett
i
ng the DYB to
a
1 protect
s
the
s
ector from progr
a
m
s
or er
as
e
s.
Si
nce th
is
is
a
vol-
a
t
i
le
bi
t, remov
i
ng power or re
s
ett
i
ng the dev
i
ce w
i
ll
cle
a
r the DYB
s.
The
ba
nk
a
ddre
ss
is
l
a
tched when the
comm
a
nd
is
wr
i
tten
.
The PPB Lock comm
a
nd
is
perm
i
tted
i
f the
S
ec
Si
s
ec-
tor
is
en
ab
led
.
DYB
S
tatu
s
The progr
a
mm
i
ng of the DYB for
a
g
i
ven
s
ector c
a
n
b
e
ver
i
f
i
ed
b
y wr
i
t
i
ng
a
DYB
s
t
a
t
us
ver
i
fy comm
a
nd to the
dev
i
ce
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDD160GB17DKF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DKI | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DKK | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DPBE | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB17DPBF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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