參數(shù)資料
型號(hào)： AL1402
廠商： Electronic Theatre Controls, Inc.
元件分類： 圓形連接器
英文描述： Circular Connector; No. of Contacts:100; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No
中文描述： OPTOREC轉(zhuǎn)爐
文件頁(yè)數(shù)： 7/8頁(yè)
文件大?。?/td> 156K
代理商： AL1402
Alesis Semiconductor
12555 J efferson Blvd., Suite 285
Los Angeles, CA 90066
Fax (310) 306-1551
- 7 -
DS1402-0702
Phone (310) 301-0780
www.alesis-semi.com
Application Notes
The clock and data outputs of the AL1402
are undefined after power-up until a proper
data stream is well established at OPDIGIN
(pin 6). The clock outputs may be running
at an uncontrolled frequency.
the ERROR pin will be high, indicating that
the outputs
are invalid.
prevented by applying logic one to FORMAT1
(pin 4) and logic zero to FORMAT0 (pin 3) on
power-up. This resets the AL1402, stopping
the VCO clocks and muting the data output.
The FORMAT pins may then be set to the
value required in your system. Nevertheless
the AL1402 will synchronize and produce
proper
outputs
when
inputs
are
provided,
procedure is used or not.
In this case,
This
may
be
proper
whether
and
this
valid
reset
The
produce
uncontrolled frequencies if the digital input
becomes
unstable after
mostly to poor connection of the optical
cable to the optical connector.
AL1402
in
Master
outputs
Mode
can
also
clock
running
at
stable use,
due
If this is
unwanted in the system an external AND
implementation can be used to correct this.
The inverted error pin
AL1402 output clock are inputs to the AND
and the desired mutable clock is output.
This AND function will mute the selected
AL1402 clock when the error pin is high (i.e.
when unstable input is present at OpDigIn).
Care should be taken when running the
AL1402
with
the
AL1201
AL1201 DAC will output noise if the AL1402
WDCLK is at an uncontrolled VCO frequency
that
is
beyond
the
frequency.
The
aforementioned
function can be used to select the AL1402
WDCLK
to
be
muted
OpDigInput is present before proceeding as
the AL1201 WDCLK. See Figure F. with the
AND
function
implemented
gates. In place of this circuit the ERROR pin
can be used as a mute select for any audio
output stage muting circuitry that may be
present in the system
.
and
the desired
DAC
as
the
AL1201
maximum
AND
when
invalid
with
NAND
Figure F. AL1402 –AL1201 CLK MUTE CIRCUIT.
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