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參數(shù)資料
| 型號(hào)： | AKD4551.(AKD4551) |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Evaluation board Rev.C for AKD4551 |
| 中文描述： | 評(píng)價(jià)AKD4551板Rev.C |
| 文件頁(yè)數(shù)： | 2/17頁(yè) |
| 文件大?。?/td> | 110K |
| 代理商： | AKD4551.(AKD4551) |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
ASAHI KASEI
[AKD4551]
<KM062000>
’00/3
- 2 -
n
Input Circuit
External analog signal fed through the BNC connector is terminated by a resistor of 560 ohms. The resistor value should be
properly selected in order to meet the output impedance of the signal source.
AINL(AINR)
AINL(AINR)
560
470
+
4.7u
2.2n
Figure 2. Input buffer circuit on board
* AKM assumes no responsibility for the trouble when using the circuit examples.
n
Analog Output Circuit
The AK4551 includes a combination of switched-capacitor filter (SCF) and continuous-time filter (CTF), so any external
filters are not required.
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Grounding and Power Supply Decoupling
To minimize the coupling by digital noise, VDD pin should be supplied from analog power supply in system. Decouling
capacitors should be connected to AK4551 as near as possible. Especially, the capacitor between VDD and VSS pins
should be connected nearest.
n
Operation sequence
1) Set up the power supply lines.
[VA](orange)
[VP] (orange)
[VD](red)
[AGND] (black)
[DGND] (black)
= 2.2
～
3.6V : for VDD of AK4551
= 2.2
～
3.6V : for VP of 74HC4050
= 3.6
～
5.0V : for logic
= 0V
: for analog ground (including VSS of AK4551)
= 0V
: for logic ground
Each supply line should be distributed from the power supply unit.
VP and VA must be same voltage level.
2) Set up the evaluation mode, jumper pins and DIP switches.
(See the followings.)
3) Power on.
The AK4551 should be reset once bringing SW1,2 ( PWAD , PWDA ) “OFF” upon power-up.
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| AKD5351 | EVALUATION BOARD REV.B FOR AK5351 |
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