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參數(shù)資料
| 型號： | AKD4525 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 20BIT STEREO ADC & DAC WITH X TAL OSC |
| 中文描述： | 20位立體聲ADC |
| 文件頁數(shù)： | 16/18頁 |
| 文件大小： | 152K |
| 代理商： | AKD4525 |
ASAHI KASEI
[AK4525]
MS0053-E-00
2000/9
- 16 -
AK4525
AINR+
1.5nF
330
+
Vop=VA=5V
Signal
10k
330
0.1u
22u
4.7k
10k
3.2Vpp
1.5Vpp
2
3
4
5
AINR-
AINL-
AINL+
10k
Vop
4.7k
Vop
4.7k
10u
BIAS
Same circuit
1.5Vpp
NJM2100
+
+
-
-
Figure 11. Differential Input Buffer Example
4.
Analog Outputs
The analog outputs are also single-ended and centered around the VCOM voltage. The input signal range scales with the
supply voltage and nominally 0.58 x VREFH Vpp. The DAC input data format is 2’s complement. The output voltage is
a positive full scale for 7FFFFH(@20bit) and a negative full scale for 80000H(@20bit). The ideal output is VCOM
voltage for 00000H(@20bit). The internal switched-capacitor filter and continuous-time filter remove most of the noise
generated by the delta-sigma modulator of DAC beyond the audio passband.
DC offsets on analog outputs are eliminated by AC coupling since DAC outputs have DC offsets of a few mV. Figure 12
shows the example of external op-amp circuit with 6dB gain. The output signal is inverted by using the circuit in this
case.
AOUTL
2.9Vpp
BIAS
Vop
Vop
Lch Out
5.22Vpp
10k
18k
27k
10u
+
4.7k
4.7k
0.1u
10u
+
-
+
27u
+
Rch Op-amp
Optional amp with 6dB gain
Vop=12V
NJM5532
Figure 12. External analog circuit example (gain=6dB)
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