參數(shù)資料
型號： AKD4380
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： EVALUATION BOARD REV.A FOR AK4380
中文描述： 評價委員會版本A的AK4380
文件頁數(shù)： 3/21頁
文件大小： 220K
代理商： AKD4380
ASAHI KASEI
[AKD4380]
<KM061500>
’00/04
- 3 -
3) Using AKM’s evaluation board for ADC
To evaluate AK4380 with analog input, the AKM’s evaluation board for ADC can be used. MCLK, BICK and
LRCK are supplied from clock generator on the AKD4380, and analog signal is A/D converted and send to
AKD4380 through PORT2(ADC/ROM). In case of using external master clock through a BNC connector, select
“BNC” on JP12(MCLK) and short JP13(XTE).
JP12
MCLK
JP11
DIR
JP3
BICK
DIR
ADC
JP4
LRCK
JP10
DIR_DATA
JP9
SDTI
DIR
ADC
D
X
E
GND
VD
DATA
GND
JP13
XTE
4) Feeding all signals from external
Under the following set-up, all external signals can be fed through POTR2.
JP12
MCLK
JP11
DIR
JP3
BICK
DIR
ADC
JP4
LRCK
JP10
DIR_DATA
JP9
SDTI
DIR
ADC
D
X
E
GND
VD
DATA
GND
JP13
XTE
n
Clock (MCLK,BICK,LRCK) set up
In case of using evaluation mode 1), JP9,10 and 17 should be set up as follows.
They need no care for other evaluation mode.
MCLK
JP5
(X_MCLK)
256/128
JP8
(X_LRCK)
LR_128
BICK
JP7
(X_BICK)
64fs/32fs
128fs/64fs
32fs
64fs/32fs
128fs/64fs
32fs
64fs/32fs
128fs/64fs
128fs
32fs
64fs
32fs
64fs
128fs
32fs
64fs
128fs
256fs
256/128
LR_256/512
default
512fs
512
LR_256/512
Table 1. Clock set up
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AKD4380/EVAL-BOARD 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:
AKD4380_04 制造商:AKM 制造商全稱:AKM 功能描述:96kHz sampling 24BitツヒDAC
AKD4381 制造商:AKM 制造商全稱:AKM 功能描述:108DB 192KHZ 24-BIT 2CH DAC
AKD4382 制造商:AKM 制造商全稱:AKM 功能描述:112dB 192kHz 24-BIT SCH DAC
AKD4382A-SB 制造商:AKM 制造商全稱:AKM 功能描述:192kHz sampling 24Bit ツヒ DAC
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