參數(shù)資料
型號: AK5392-VS
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Enhanced Dual Bit 24Bit ADC
中文描述: 增強雙位24位模數(shù)轉(zhuǎn)換器
文件頁數(shù): 13/19頁
文件大?。?/td> 171K
代理商: AK5392-VS
ASAHI KASEI
[AK5392]
0188-E-01
1997/11
- 13 -
Offset Calibration
When
RST
pin goes to "L", the digital section is powered-down. Upon returning "H", an offset calibration cycle is
started. An offset calibration cycle should always be initiated after power-up.
During the offset calibration cycle, the digital section of the part measures and stores the values of calibration input
of each channel in registers. The calibration input value is subtracted from all future outputs. The calibration input
may be obtained from either the analog input pins (AIN+/-) or the VCOM pins depending on the state of the ZCAL
pin. With ZCAL "H", the analog input pin voltages are measured, and with ZCAL "L", the VCOM pin voltages are
measured. The CAL output is "H" during calibration.
Digital High Pass Filter
The AK5392 also has a digital high pass filter for DC offset cancel. The cut-off frequency of the HPF is 1Hz at
fs=48kHz and also scales with sampling rate(fs).
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