參數(shù)資料
型號: AK5366
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:6; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-6 RoHS Compliant: No
中文描述: 24位48KHz的ADC,帶選擇器/美國PGA / ALC的
文件頁數(shù): 9/43頁
文件大小: 338K
代理商: AK5366
ASAHI KASEI
[AK5366
]
MS0309-E-00
2004/05
- 9 -
ANALOG CHARACTERISTICS
(Ta=25
°
C; AVDD=TVDD=5.0V, DVDD=3.3V; AVSS=DVSS=0V; fs=48kHz; BICK=64fs;
Signal Frequency=1kHz; 24bit Data; Measurement frequency=20Hz
20kHz at fs=48kHz; unless otherwise specified)
Parameter
Pre-Amp Characteristics:
Feedback Resistance
S/(N+D) (Note 6)
S/N (A-weighted) (Note 6)
Load Resistance (Note 7)
Load Capacitance
Input PGA Characteristics:
Input Voltage (Note 8)
Input Resistance (Note 9)
Step Size
Gain Control Range
ALC = ON
ADC Analog Input Characteristics: IPGA=0dB, ALC = OFF
(Note 10)
Resolution
S/(N+D) (
0.5dBFS)
DR (
60dBFS, A-weighted)
S/N (A-weighted)
Interchannel Isolation (Note 11)
Interchannel Gain Mismatch
Gain Drift
Power Supply Rejection (Note 12)
Power Supplies
Power Supply Current
Normal Operation (PDN pin = “H”)
AVDD
DVDD+TVDD
Power-down mode (PDN pin = “L”) (Note 13)
AVDD
DVDD+TVDD
Note 6. This value is measured at LOUT and ROUT pins using the circuit as shown in Figure 25.
The input signal voltage is 2Vrms.
Note 7. This value is the input impedance of an external device that the LOUT and ROUT pins can drive, when a device
is
connected with LOUT and ROUT pin externally. The feedback resistor (min. 10k
) that it is usually connected
with the LOUT/ROUT pins, and the value of input impedance (min. 6.3k
) of the IPGAL/R pins are not
included.
Note 8. Full scale (0dB) of the input voltage at ALC=OFF and IPGA=0dB.
Input voltage to IPGAL and IPGAR pins is proportional to AVDD voltage. typ. Vin = 0.2 x AVDD (Vrms).
Note 9. This value is input impedance of the IPGAL and IPGAR pins.
Note 10. This value is measured via the following path. Pre-Amp
IPGA (Gain : 0dB)
ADC.
The measurement circuit is Figure 25.
Note 11. This value is the interchannel isolation between all the channels of the LIN1-5 and RIN1-5 when the applied
input
signal causes the Pre-Amp output to equal IPGA input.
Note 12. PSR is applied to AVDD, DVDD and TVDD with 1kHz, 50mVpp.
Note 13. All digital input pins are held DVSS.
min
typ
max
Units
10
-
-
6.3
50
20
k
dB
dB
k
pF
100
108
0.9
6.3
0.2
0
9.5
1
10
0.5
1.1
15
0.8
+18
+18
Vrms
k
dB
dB
dB
ALC = OFF
24
0.5
-
-
Bits
dB
dB
dB
dB
dB
ppm/
°
C
dB
84
96
96
90
94
103
103
110
0.2
100
50
23
4
10
10
35
8
100
100
mA
mA
μ
A
μ
A
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