參數(shù)資料
型號: AK5365VQ
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 24-BIT 96KHZ ADC WITH SELETOR/PGA/ALCl
中文描述: 24位96kHz與SELETOR藝術(shù)發(fā)展局/美國PGA /淋巴瘤
文件頁數(shù): 7/41頁
文件大小: 286K
代理商: AK5365VQ
ASAHI KASEI
[AK5365
]
MS0164-E-01
2002/08
- 7 -
ANALOG CHARACTERISTICS
(Ta=25
°
C; AVDD=5.0V, DVDD=3.3V; AVSS=DVSS=0V; fs=48kHz, 96kHz; BICK=64fs; Signal Frequency=1kHz;
24bit Data; Measurement frequency=20Hz
20kHz at fs=48kHz, 40Hz
40kHz at fs=96kHz; unless otherwise specified)
Parameter
Pre-Amp Characteristics:
Feedback Resistance
S/(N+D) (Note 4)
S/N (A-weighted)
Load Resistance (Note 5)
Load Capacitance
Input PGA Characteristics:
Input Voltage (Note 6)
Input Resistance (Note 7)
Step Size
Gain Control Range
ALC = OFF
ALC = ON
ADC Analog Input Characteristics: IPGA=0dB, ALC = OFF
(Note 8)
Resolution
S/(N+D) (
0.5dBFS)
fs=48kHz
fs=96kHz
DR (
60dBFS)
fs=48kHz, A-weighted
fs=96kHz
S/N
fs=48kHz, A-weighted
fs=96kHz
Interchannel Isolation (Note 9)
Interchannel Gain Mismatch
Gain Drift
Power Supply Rejection (Note 10)
Power Supplies
Power Supply Current
Normal Operation (PDN pin = “H”)
AVDD
DVDD (fs=48kHz)
(fs=96kHz)
Power-down mode (PDN pin = “L”) (Note 11)
AVDD
DVDD
min
typ
max
Units
10
-
-
6.3
50
k
dB
dB
k
pF
100
108
20
0.9
6.3
0.2
0
9.5
1
10
0.5
1.1
15
0.8
+12
+12
Vrms
k
dB
dB
dB
24
Bits
dB
dB
dB
dB
dB
dB
dB
dB
ppm/
°
C
dB
84
82
96
89
96
89
90
94
92
103
99
103
99
110
0.2
100
50
0.5
-
-
23
4
8
10
10
35
8
16
100
100
mA
mA
mA
μ
A
μ
A
Note 4. This value is measured at LOUT and ROUT pins using the circuit as shown in Figure 24.
The input signal voltage is 2Vrms.
Note 5. This value is the input impedance of an external device that the LOUT and ROUT pins can drive, when a device is
connected with LOUT and ROUT pin externally. The feedback resistor (min. 10k
) that it is usually connected
with the LOUT/ROUT pins, and the value of input impedance (min. 6.3k
) of the IPGAL/R pins are not included.
Note 6. Full scale (0dB) of the input voltage at ALC=OFF and IPGA=0dB.
Input voltage to IPGAL and IPGAR pins is proportional to AVDD voltage. Vin = 0.2 x AVDD (Vrms).
Note 7. This value is input impedance of the IPGAL and IPGAR pins.
Note 8. This value is measured via the following path. Pre-Amp
IPGA (Gain : 0dB)
ADC.
The measurement circuit is Figure 24.
Note 9. This value is the interchannel isolation between all the channels of the LIN1-5 and RIN1-5 when the applied input
signal causes the Pre-Amp output to equal IPGA input.
Note 10. PSR is applied to AVDD and DVDD with 1kHz, 50mVpp.
Note 11. All digital input pins are held DVDD or DVSS.
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