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參數(shù)資料
| 型號： | AK4564VQ |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP |
| 中文描述： | 16位編解碼器，配有ALC和麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷 |
| 文件頁數(shù)： | 27/48頁 |
| 文件大?。?/td> | 382K |
| 代理商： | AK4564VQ |
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ASAHI KASEI
[AK4564]
MS0140-E-01
2002/07
- 27 -
n
ALC1 Operation
1. ALC1 Limiter Operation
When the ALC1 limiter is enabled and either Lch or Rch exceed the ALC1 limiter detection level (LMTH1-0), the IVOL
value is attenuated by the amount defined in the ALC1 limiter ATT step (LMAT1-0) automatically. The operation is done
at the zero crossing points of the waveform. And the timeout period of the zero crossing detection is set by ZTM1-0 bits.
The IVOL value is common between L/R channels.
After finishing the operation for attenuation, if ALC1 bit is set to “0”, the operation of attenuation repeats when the input
signal level exceed the ALC1 limiter detection level (LMTH1-0).
2. ALC1 Recovery Operation
After completing an ALC1 limiter operation, the ALC1 recovery operation waits a time defined in WTM1-0 bits. If the
input signal does not exceed the “ALC1 recovery waiting counter reset level (LMTH1-0)” during the waiting time, the
ALC1 recovery operation starts. The IVOL value increases automatically up to the set reference level (REF7-0 bits)
during this operation. The IVOL value is common between L/R channels. The ALC1 recovery operation is done at a
period set by WTM1-0 bits. If the zero crossing operation of both L/R channels is completed during WTM1-0 period, the
ALC1 recovery operation waits WTM1-0 period and then the next recovery operation starts.
When “ALC1 recovery waiting counter reset level (LMTH1-0)
≤
Output Signal < ALC1 limiter detection level
(LMTH1-0)” during the ALC1 recovery operation, the waiting timer of ALC1 recovery operation is reset. When “ALC1
recovery waiting counter reset level (LMTH1-0) > Output Signal”, the waiting timer of ALC1 recovery operation starts.
When large noise is input to microphone instantaneously, the quality of small level in the large noise can be improved by
FR bit = “1”.
n
Writing to IVOL register when ALC1 is OFF
When writing control register continuously, the change of IVOL should be written after zero crossing timeout. If IVOL is
changed by writing to control register before zero crossing detection, IVOL value of L/R channels may not give a
difference level.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AKD4564 | 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP |
| AK4565 | LOW POWER 20BIT CODEC WITH BUILT IN ALC |
| AK4565VF | LOW POWER 20BIT CODEC WITH BUILT IN ALC |
| AK4566 | 20bit Stereo CODEC with built-in IPGA & HP-AMP |
| AK4566VN | 20bit Stereo CODEC with built-in IPGA & HP-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4565 | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 20BIT CODEC WITH BUILT IN ALC |
| AK4565VF | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 20BIT CODEC WITH BUILT IN ALC |
| AK4566 | 制造商:AKM 制造商全稱:AKM 功能描述:20bit Stereo CODEC with built-in IPGA & HP-AMP |
| AK4566VN | 制造商:AKM 制造商全稱:AKM 功能描述:20bit Stereo CODEC with built-in IPGA & HP-AMP |
| AK4568AER | 功能描述:IC CODEC LOW POWER 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1,000 |
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