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參數(shù)資料
| 型號： | AK4534VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16Bit CODEC with MIC/HP/SPK-AMP |
| 中文描述： | 16位編解碼器麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷 |
| 文件頁數(shù)： | 58/64頁 |
| 文件大?。?/td> | 443K |
| 代理商： | AK4534VN |
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ASAHI KASEI
[AK4534]
MS0133-E-03
2003/5
- 58 -
n
MIC Input Recording
FS2-0 bits
(Addr:05H, D7-5)
MIC Control
(Addr:07H, D2-0)
PMADC bit
(Addr:00H, D0)
PMMIC bit
(Addr:00H, D1)
ADC Internal
State
XXX
000
00001
XX1XX
Power Down
Initialize Normal State Power Down
2081 / fs
(1)
(2)
(6)
(7)
ALC1 State
ALC1 Enable
ALC1 Disable
ALC1 Disable
(5)
ALC1 Control 1
(Addr:08H)
XXH
00H
(3)
ALC1 Control 2
(Addr:0AH)
XXH
47H
(4)
ALC1 Control 3
(Addr:09H)
XXH
61H or 21H
Example :
X’tal and PLL are used.
Sampling Frequency : 8kHz
Mic Select : Internal Mic
Pre Mic AMP : +20dB
MIC Power On
ALC1 setting : Refer to Figure 9
(1) Addr:05H, Data:E0H
(3) Addr:08H, Data:00H
(4) Addr:0AH, Data:47H
(5) Addr:09H, Data:61H
(2) Addr:07H, Data:0DH
(6) Addr:00H, Data 83H
Recording
(7) Addr:00H, Data 80H
Figure 38. MIC Input Recording Sequence
<Example>
This sequence is an example of ALC1 setting at fs=8kHz. If the parameter of the ALC1 is changed, please refer to
“Figure 9. Registers set-up sequence at the ALC1 operation.”
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS2-0 bits). When the AK4534 is PLL mode, MIC and ADC should be powered-up
in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up MIC input (Addr: 07H)
(3) Set up Timer Select for ALC1 (Addr: 08H)
(4) Set up REF value for ALC1 (Addr: 0AH)
(5) Set up LMTH, RATT, LMAT1-0, ALC1 bits (Addr: 09H)
(6) Power Up MIC and ADC: PMMIC bit = PMADC bit = “0”
→
“1”
The initialization cycle time of ADC is 2081/fs=47.2ms@fs=44.1kHz.
After the ALC1 bit is set to “1” and MIC block is powered-up, the ALC1 operation starts from IPGA initial
value (0dB).
(7) Power Down MIC and ADC: PMMIC bit = PMADC bit = “1”
→
“0”
When the registers for the ALC1 operation are not changed, ALC1 bit may be keeping “1”. The ALC1
operation is disabled because the MIC block is powered-down. If the registers for the ALC1 operation are also
changed when the sampling frequency is changed, it should be done after the AK4534 goes to the manual mode
(ALC1 bit = “0”) or MIC block is powered-down (PMMIC bit = “0”). IPGA gain is reset when PMMIC bit is
“0”, and then IPGA operation starts from the default value when PMMIC is changed to “1”.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4536 | 16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| AK4536VN | 16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| AK4537 | 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP |
| AK4537VN | 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP |
| AK4538 | 16Bit DS CODEC with MIC/HP/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4534VQ | 功能描述:IC CODEC 16BIT MIC/HP/SPK-AMP 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時間 標(biāo)準(zhǔn)包裝:1,000 |
| AK4536 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| AK4536VN | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| AK4537 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP |
| AK4537VN | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP |
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