參數(shù)資料
型號(hào)： AK4527BVQ
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： HIGH PERFORMANCE MULTI-CHANNEL AUDIO CODEC
中文描述： 高性能多通道音頻解碼器
文件頁數(shù)： 15/33頁
文件大小： 292K
代理商： AK4527BVQ
ASAHI KASEI
[AK4527B]
MS0056-E-00
2000/10
- 15 -
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
MCLK (MHz)
256fs
-
-
-
22.5792
24.5760
512fs
16.3840
22.5792
24.5760
-
-
Sampling
Speed
Normal
Double
Table 5. System Clock Example (Auto Setting Mode)
n
De-emphasis Filter
The AK4527B includes the digital de-emphasis filter (tc=50/15μs) by IIR filter. This filter corresponds to three sampling
frequencies (32kHz, 44.1kHz, 48kHz). De-emphasis of each DAC can be set individually by register data of DEMA1-C0
(DAC1: DEMA1-0, DAC2: DEMB1-0, DAC3: DEMC1-0, see “Register Definitions”).
Mode
0
1
2
3
4
5
6
7
Sampling Speed
Normal Speed
Normal Speed
Normal Speed
Normal Speed
Double Speed
Double Speed
Double Speed
Double Speed
DEM1
0
0
1
1
0
0
1
1
DEM0
0
1
0
1
0
1
0
1
DEM
44.1kHz
OFF
48kHz
32kHz
OFF
OFF
OFF
OFF
Default
Table 6. De-emphasis control
n
Digital High Pass Filter
The ADC has a digital high pass filter for DC offset cancel. The cut-off frequency of the HPF is 0.9Hz at fs=44.1kHz and
also scales with sampling rate (fs).
n
Audio Serial Interface Format
Four serial data modes can be selected by the DIF0 and DIF1 pins (P/S = “H”) or bits (P/S = “L”) as shown in Table 7. In
all modes the serial data is MSB-first, 2’s compliment format. The SDTO is clocked out on the falling edge of BICK and
the SDTI/DAUX are latched on the rising edge of BICK.
Figures 1
～
4 shows the timing at SDOS = “L”. In this case, the SDTO outputs the ADC output data. When SDOS = “H”,
the data input to DAUX is converted to SDTO’s format and output from SDTO. Mode 2 and mode 3 in SDTI/DAUX
input formats can be used for 16-20bit data by zeroing the unused LSBs.
Mode
0
1
2
3
DIF1
0
0
1
1
DIF0
0
1
0
1
SDTO
SDTI1-3, DAUX
20bit, LSB justified
24bit, LSB justified
24bit, MSB justified
24bit, IIS (I2S)
LRCK
H/L
H/L
H/L
L/H
24bit, MSB justified
24bit, MSB justified
24bit, MSB justified
24bit, IIS (I2S)
Default
Table 7. Audio data formats
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AK4528VFP-E2 功能描述:IC AUDIO CODEC 24BIT 28VSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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