參數(shù)資料
型號: AK4420
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 192kHz 24-Bit Stereo ツヒ DAC with 2Vrms Output
中文描述: 192kHz的24位立體聲ツヒDAC,具有2Vrms的輸出
文件頁數(shù): 16/19頁
文件大?。?/td> 373K
代理商: AK4420
[AK4420]
1. Grounding and Power Supply Decoupling
VDD, CVDD and VSS are supplied from the analog supply and should be separated from the system digital supply.
Decoupling capacitors, especially 0.1
μ
F ceramic capacitors for high frequency bypass, should be placed as near to VDD
and CVDD as possible. The differential voltage between VDD and VSS pins set the analog output range.
The power-up
sequence between VDD and CVDD is not critical.
2. Analog Outputs
The analog outputs are single-ended and centered around the VSS (ground) voltage. The output signal range is typically
2.12Vrms (typ @VDD=5V). The internal switched-capacitor filter (SCF) and continuous-time filter (CTF) attenuate the
noise generated by the delta-sigma modulator beyond the audio passband. Using single a 1
st
-order LPF (
Figure 11
) can
reduce noise beyond the audio passband.
Figure 12
shows example in the case of 10k
, 100k
terminus.
The output voltage is a positive full scale for 7FFFFFH (@24bit data) and a negative full scale for 800000H (@24bit
data). The ideal output is 0V (VSS) voltage for 000000H (@24bit data). The DC offset is ±60mV or less.
470
AOUT
2.2nF
AK4420
2.12Vrms (typ)
Analog
Out
(fc = 154kHz, gain = -0.28dB @ 40kHz, gain = -1.04dB @ 80kHz)
Figure 11. External 1
st
order LPF Circuit Example1
AOUT
820
1000pF
AK4420
Analog
Out
220
10k
1.92Vrms (typ)
100k
2.1Vrms (typ)
47
μ
47k
Figure 12. External 1
st
order LPF Circuit Example2
MS0683-E-02
2007/12
- 16 -
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