參數(shù)資料
型號(hào): AK4393VF
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: ADVANCED MULTI-BIT 96KHZ 24-BIT DAC
中文描述: 先進(jìn)的多位96kHz的24位DAC
文件頁(yè)數(shù): 3/22頁(yè)
文件大小: 235K
代理商: AK4393VF
ASAHI KASEI
[AK4393]
M0039-E-01
2000/5
- 3 -
PIN/FUNCTION
No.
1
2
3
Pin Name
DVSS
DVDD
MCLK
PDN
I/O
-
-
I
I
Function
Digital Ground Pin
Digital Power Supply Pin, 3.3V or 5.0V
Master Clock Input Pin
Power-Down Mode Pin
When at “L”, the AK4393 is in power-down mode and is held in reset.
The AK4393 should always be reset upon power-up.
Audio Serial Data Clock Pin
The clock of 64fs or more than is recommended to be input on this pin.
Audio Serial Data Input Pin
2’s complement MSB-first data is input on this pin.
L/R Clock Pin
Soft Mute Pin in parallel mode
When this pin goes "H", soft mute cycle is initiated.
When returning “L”, the output mute releases.
Chip Select Pin in serial mode
Double Speed Sampling Mode Pin (Internal pull-down pin)
“L”: Normal Speed , “H”: Double Speed
De-emphasis Enable Pin in parallel mode
Control Data Clock Pin in serial mode
De-emphasis Enable Pin in parallel mode
Control Data Input Pin in serial mode
Digital Input Format Pin
Digital Input Format Pin
Digital Input Format Pin
Substrate Ground Pin, 0V
Low Level Voltage Reference Input Pin
High Level Voltage Reference Input Pin
Analog Power Supply Pin, 5.0V
Analog Ground Pin, 0V
Rch Negative analog output Pin
Rch Positive analog output Pin
Lch Negative analog output Pin
Lch Positive analog output Pin
Common Voltage Output Pin, 2.6V
Parallel/Serial Select Pin (Internal pull-up pin)
“L”: Serial control mode, “H”: Parallel control mode
Master Clock Select Pin
Master Clock Select Pin
Master Clock Select Pin
4
5
BICK
I
6
SDATA
I
7
LRCK
SMUTE
I
I
8
CSN
DFS
I
I
9
DEM0
CCLK
DEM1
CDTI
DIF0
DIF1
DIF2
BVSS
VREFL
VREFH
AVDD
AVSS
AOUTR-
AOUTR+
AOUTL-
AOUTL+
VCOM
P/S
I
I
I
I
I
I
I
-
I
I
-
-
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
O
O
O
O
O
I
26
27
28
CKS0
CKS1
CKS2
I
I
I
Note: All input pins except internal pull-up/down pins should not be left floating.
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