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參數(shù)資料
| 型號： | AK4382VT |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 112dB 192kHz 24-BIT SCH DAC |
| 中文描述： | 一一二分貝192kHz的24位三星援 |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 251K |
| 代理商： | AK4382VT |
ASAHI KASEI
[AK4382]
MS0034-E-00
2000/7
- 9 -
OPERATION OVERVIEW
n
System Clock
The external clocks, which are required to operate the AK4382, are MCLK, LRCK and BICK. The master clock (MCLK)
should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation
filter and the delta-sigma modulator. There are two methods to set MCLK frequency. In Manual Setting Mode (ACKS =
“0”: Register 00H), the sampling speed is set by DFS0/1(Table 1). The frequency of MCLK at each sampling speed is set
automatically. (Table 2~4). In Auto Setting Mode (ACKS = “1”: Default), as MCLK frequency is detected automatically
(Table 5), and the internal master clock becomes the appropriate frequency (Table 6), it is not necessary to set DFS0/1.
All external clocks (MCLK,BICK and LRCK) should always be present whenever the AK4382 is in the normal operation
mode (PDN= ”H”). If these clocks are not provided, the AK4382 may draw excess current because the device utilizes
dynamic refreshed logic internally. The AK4382 should be reset by PDN= “L” after threse clocks are provided. If the
external clocks are not present, the AK4382 should be in the power-down mode (PDN= “L”). After exiting reset at
power-up etc., the AK4382 is in the power-down mode until MCLK and LRCK are input.
DFS1
0
0
1
DFS0
0
1
0
Sampling Rate (fs)
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
8kHz~48kHz
60kHz~96kHz
120kHz~192kHz
Default
Table 1. Sampling Speed (Manual Setting Mode)
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
MCLK
BICK
64fs
256fs
384fs
512fs
768fs
8.1920MHz
11.2896MHz
12.2880MHz
12.2880MHz
16.9344MHz
18.4320MHz
16.3840MHz
22.5792MHz
24.5760MHz
24.5760MHz
33.8688MHz
36.8640MHz
2.0480MHz
2.8224MHz
3.0720MHz
Table 2. System Clock Example (Normal Speed Mode @Manual Setting Mode)
LRCK
fs
88.2kHz
96.0kHz
MCLK
BICK
64fs
128fs
192fs
256fs
384fs
11.2896MHz
12.2880MHz
16.9344MHz
18.4320MHz
22.5792MHz
24.5760MHz
33.8688MHz
36.8640MHz
5.6448MHz
6.1440MHz
Table 3. System Clock Example (Double Speed Mode @Manual Setting Mode)
LRCK
fs
176.4kHz
192.0kHz
MCLK
BICK
64fs
128fs
192fs
22.5792MHz
24.5760MHz
33.8688MHz
36.8640MHz
11.2896MHz
12.2880MHz
Table 4. System Clock Example (Quad Speed Mode @Manual Setting Mode)
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