參數(shù)資料
型號(hào): AK4364VF
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 96kHz 24BIT DAC WITH PLL AND DIT
中文描述: 96kHz的24位DAC,帶有鎖相環(huán)和DIT
文件頁數(shù): 25/34頁
文件大小: 265K
代理商: AK4364VF
ASAHI KASEI
[AK4364]
MS0014-E-01
2000/07
- 25 -
n
Register Definitions
Addr
00H
Register Name
Control 1
Default
D7
0
0
D6
0
0
D5
0
0
D4
EXT
0
D3
DIF2
1
D2
DIF1
0
D1
DIF0
1
D0
RSTN
1
RSTN: Internal timing reset
0: Reset. DZF pin goes to “H” and registers are not initialized.
1: Normal operation
When the states of DIF2-0,EXT,CKS2-0,DFS1-0 or FS1-0 changes, the AK4364 should be reset by
PDN pin or RSTN bit. Some click noise may occur at that timing.
DIF2-0: Audio data interface modes (See Table 4.)
Initial: “101”, Mode 5
EXT: Master clock select
0: PLL mode (27MHz clock input)
1: External clock mode. Internal VCO is powered down.
Addr
01H
Register Name
Control 2
Default
D7
FS1
0
D6
FS0
0
D5
DFS1
0
D4
DFS0
0
D3
CKS2
0
D2
CKS1
0
D1
CKS0
0
D0
RSTN
1
RSTN: Internal timing reset
0: Reset. DZF pin goes to “H” and registers are not initialized.
1: Normal operation
When the states of DIF2-0,EXT,CKS2-0,DFS1-0 or FS1-0 changes, the AK4364 should be reset by
PDN pin or RSTN bit. Some click noise may occur at that timing.
CKS2-0: Clock select (See Table 2.)
Initial: “000”
DFS1-0: Half/Normal/Double sampling modes (See Table 1,2), De-emphasis response (See Table 7.)
Initial: “00”
FS1-0: Sampling frequency modes (See Table 1.)
Initial: “00”
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