參數(shù)資料
型號(hào)： AK4358VQ
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： 192 KHZ 24 BIT 8 CH DAC WITH DSD INPUT
中文描述： 192千赫24位8路DAC，具有DSD輸入
文件頁(yè)數(shù)： 32/35頁(yè)
文件大?。?/td> 457K
代理商： AK4358VQ
ASAHI KASEI
[AK4358]
MS0203-E-00
2003/02
- 32 -
Analog Ground
Digital Ground
System
Controller
SDTI4
D
13
SDTI1
1
14
SDTI2
15
SDTI3
16
LRCK
17
I2C
18
CCLK/SCL
19
CDTI/SDA
20
CSN/CAD1
21
DCLK
22
DSDL4
23
D
2
48
L
AK4358
2
2
2
2
3
3
3
3
3
3
D
D
D
D
D
D
R
R
V
A
47
ROUT1-
46
LOUT2+
45
LOUT2-
44
ROUT2+
43
ROUT2-
42
LOUT3+
41
LOUT3-
40
ROUT3+
39
ROUT3-
38
LOUT4+
M
B
9
P
8
C
7
C
6
D
5
D
4
D
3
L
2
1
D
DSDR4
24
3
A
37
LOUT4-
Figure 26. Ground Layout
AVSS and DVSS must be connected to the same analog ground plane.
1. Grounding and Power Supply Decoupling
AVDD and DVDD are usually supplied from analog supply in system and should be separated from system digital
supply. Alternatively if AVDD and DVDD are supplied separately, the power up sequence is not critical.
AVSS and
DVSS of the AK4358 must be connected to analog ground plane
. System analog ground and digital ground should be
connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitor, especially
0.1
μ
F ceramic capacitor for high frequency should be placed as near to AVDD and DVDD as possible.
2. Voltage Reference
VREFH sets the analog output range. VREFH pin is normally connected to AVDD with a 0.1
μ
F ceramic capacitor. All
signals, especially clocks, should be kept away from the VREFH pin in order to avoid unwanted coupling into the
AK4358.
3. Analog Outputs
The analog outputs are full-differential outputs and 0.5 x VREFH Vpp (typ) centered around the internal common voltage
(about AVDD/2). The differential outputs are summed externally, V
AOUT
=(AOUT+)-(AOUT-) between AOUT+ and
AOUT-. If the summing gain is 1, the output range is 5.0Vpp (typ @VREFH=5V). The bias voltage of the external
summing circuit is supplied externally. The input data format is 2’s complement. The output voltage(V
AOUT
) is a positive
full scale for 7FFFFF (@24bit) and a negative full scale for 800000H (@24bit). The ideal V
AOUT
is 0V for 000000H
(@24bit).
The internal switched-capacitor filter and external low pass filter attenuate the noise generated by the delta-sigma
modulator beyond the audio passband. DC offset on AOUT+/- is eliminated without AC coupling since the analog
outputs are differential.
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