參數(shù)資料
型號(hào): AK4319A
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 18Bit SCF DAC
中文描述: 18位超臨界數(shù)模轉(zhuǎn)換器
文件頁(yè)數(shù): 3/18頁(yè)
文件大?。?/td> 177K
代理商: AK4319A
ASAHI KASEI
[AK4319A]
M0011-E-01
1998/6
- 3 -
PIN/FUNCTION
No.
Pin Name
I/O
Function
1
2
3
4
5
DIF1
DVDD
DVSS
LRCK
BICK
I
-
-
I
I
Digital Input Format Pin (Internal Pull-down pin)
Digital Power Supply
Digital Ground Pin
L/R Clock Pin
Audio Serial Data Clock Pin
6
SDATA
I
Audio Serial Data Input Pin
2's complement MSB-first data is input on this pin.
Power-Down Mode Pin
When at "L", the AK4319A is in power-down mode and is held in reset.
The AK4319A should always be reset upon power-up.
Master Clock Input Pin
A crystal can be connected between this pin and XTO, or an external
CMOS clock can be input on XTI.
Crystal Oscillator Output Pin
When an external clock is input, this pin should be left floating.
Clock Output Pin
The inverted XTI clock is output.
Soft Mute Pin
When this pin goes "H", soft mute cycle is initiated.
When returning "L", the output mute releases.
De-emphasis Frequency Select Pin
De-emphasis Frequency Select Pin
Master Clock Select Pin
"L": MCLK=256fs,"H": MCLK=384fs
Test Pin
Must be left floating or tied to AVSS.
Rch Negative analog output pin
Rch Positive analog output pin
Lch Negative analog output pin
7
PD
I
8
XTI
I
9
XTO
O
10
CLKO
O
11
SMUTE
I
(Internal Pull-down pin)
12
13
14
DEM0
DEM1
CKS
I
I
I
(Internal Pull-down pin)
15
TST
I
(Internal Pull-down pin)
16
17
18
AOUTR-
AOUTR+
AOUTL-
O
O
O
19
20
AOUTL+
VREF
O
O
Lch Positive analog output pin
Voltage Reference Output Pin, 3.0V (typ, respects to AVSS)
Normally connected to AVSS with a 0.1uF ceramic capacitor in parallel
witha 10uF electrolytic capacitor.
Analog Power Supply Pin
21
AVDD
-
22
23
AVSS
DZF
-
Analog Ground pin
Zero Input Detect Pin
O
24
DIF0
I
Digital Input Format Pin
(Internal Pull-down pin)
Note: All input pins except pull-down pins should not be left floating.
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