
ASAHI KASEI
[AK4103A]
MS0251-E-00
2003/07
- 4 -
PIN/FUNCTION
No.
1
2
Pin Name
V1
TRANS
I/O
I
I
Description
Validity Bit Input Pin
Audio Routing Mode (Transparent Mode) Pin at Synchronous mode
0: Normal mode, 1: Audio routing mode (transparent mode)
Power Down & Reset Pin (Pull-up Pin)
When “L”, the AK4103A is powered-down, TXP/N pins are “L” and the
control registers are reset to default values.
Master Clock Input Pin
Audio Serial Data Input Pin
Audio Serial Data Clock Input/Output Pin
Serial Clock for SDTI pin which can be configured as an output based on
the DIF2-0 inputs.
Input/Output Channel Clock Pin
Indicates left or right channel, and can be configured as an output based on
the DIF2-0 inputs.
Sampling Frequency Select 0 Pin at Synchronous mode (Pull-down Pin)
Host Interface Chip Select Pin at Asynchronous mode (Pull-down Pin)
AK4112B Mode Pin at Audio routing mode (Pull-down Pin)
0: Non-AKM receivers mode, 1: AK4112B mode
Sampling Frequency Select 1 Pin at Synchronous mode (Pull-down Pin)
Host Interface Data Input Pin at Asynchronous mode (Pull-down Pin)
Sampling Frequency Select 2 Pin at Synchronous mode (Pull-down Pin)
Host Interface Bit Clock Input Pin at Asynchronous mode (Pull-down Pin)
Sampling Frequency Select 3 Pin at Synchronous mode (Pull-down Pin)
Host Interface Data Output Pin at Asynchronous mode (Pull-down Pin)
Channel Status Bit Input Pin
Asynchronous/Synchronous Mode Select Pin (Pull-up Pin)
0: Asynchronous mode, 1: Synchronous mode
Block Start Input/Output Pin (Pull-down Pin)
In normal mode, the channel status block output is “H” for the first four
bytes. In audio routing mode, the pin is configured as an input. When PDN
pin = “L”, BLS pin goes “H” at Normal mode.
Clock Mode Select 0 Pin (Pull-up Pin)
Clock Mode Select 1 Pin (Pull-down Pin)
Power Supply Pin, 4.75V
~
5.25V
Ground Pin, 0V
Negative Differential Output Pin
Positive Differential Output Pin
Audio Serial Interface Select 0 Pin (Pull-down Pin)
Audio Serial Interface Select 1 Pin (Pull-down Pin)
Audio Serial Interface Select 2 Pin (Pull-down Pin)
User Data Bit Input Pin for Channel 1 (Pull-down Pin)
3
PDN
I
4
5
6
MCLK
SDTI
BICK
I
I
I/O
7
LRCK
I/O
FS0
CSN
AKMODE
I
I
I
8
FS1
CDTI
FS2
CCLK
FS3
CDTO
C1
ANS
I
I
I
I
I
O
I
I
9
10
11
12
13
14
BLS
I/O
15
16
17
18
19
20
21
22
23
24
CKS0
CKS1
VDD
VSS
TXN
TXP
DIF0
DIF1
DIF2
U1
I
I
-
-
O
O
I
I
I
I
Notes:
1. Internal pull-up and pull-down resistors are connected on-chip. The value of the resistors is 43k
(typ).
2. All input pins except internal pull-down/pull-up pins should not be left floating.