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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AGLE600V5-FG256I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 125/166闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 1KB FLASH 600K 256-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� IGLOOe
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 13824
RAM 浣嶇附瑷�(j矛)锛� 110592
杓稿叆/杓稿嚭鏁�(sh霉)锛� 165
闁€鏁�(sh霉)锛� 600000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 256-LBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 256-FPBGA锛�17x17锛�
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IGLOOe Low Power Flash FPGAs
Revision 13
2-47
1.2 V LVCMOS (JESD8-12A)
Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JESD8-12A for general purpose 1.2 V
applications. It uses a 1.2 V input buffer and a push-pull output buffer.
Table 2-64 Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks
1.2 V
LVCMOS1
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL IIL2 IIH3
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA4
Max.
mA4
A5 A5
2 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.25 * VCCI 0.75 * VCCI 2
2
20
26
10 10
Notes:
1. Applicable to V2 devices ONLY.
2. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
4. Currents are measured at high temperature (100掳C junction temperature) and maximum voltage.
5. Currents are measured at 85掳C junction temperature.
6. Software default selection highlighted in gray.
Figure 2-11 AC Loading
Table 2-65 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
01.2
0.6
鈥�
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-23 for a complete table of trip points.
Test Point
Enable Path
Datapath
5 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
5 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
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