V
參數(shù)資料
型號(hào)： ADW54012Z-0REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 2/28頁(yè)
文件大?。?/td> 0K
描述： IC CROSSPOINT SWITCH 8X8 32LFCSP
標(biāo)準(zhǔn)包裝： 1,500
功能： 交叉點(diǎn)開(kāi)關(guān)
電路： 1 x 8:8
導(dǎo)通狀態(tài)電阻： 35 歐姆
電壓電源： 單/雙電源
電壓 - 電源，單路/雙路(±)： 12 V，±5 V
電流 - 電源： 50nA
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ（5x5）
包裝： 帶卷 (TR)
ADG2188
Rev. 0 | Page 10 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
Y
2
Y
4
Y
3
Y
6
Y
7
Y
1
Y
0
Y
5
NC
VDD
NC
X7
X6
X3
X1
X0
NC
X5
X4
X2
VSS
R
E
S
E
T
A
1
S
C
L
A
2
A
0
S
D
A
G
N
D
V
L
1
2
3
4
5
6
7
8
32
31
30
29 28
27
26
25
24
23
22
21
20
19
18
17
9
1011
13141516
12
PIN 1
INDICATOR
ADG2188
8 × 8
TOP VIEW
(Not to Scale)
05
89
7-
00
3
Exposed Paddle Soldered to VSS
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions1
Pin No.
Mnemonic
Description
1
VSS
Negative Power Supply in a Dual-Supply Application. For single-supply applications, this pin should be tied to GND.
2, 19 to 23
NC
No Connect.
3 to 8,
17, 18
X0 to X7
Can be inputs or outputs.
9 to 16
Y0 to Y7
Can be inputs or outputs.
24
VDD
Positive Power Supply Input.
25
VL
Logic Power Supply Input.
26
SDA
Digital I/O. Bidirectional open drain data line. External pull-up resistor required.
27
SCL
Digital Input, Serial Clock Line. Open drain input that is used in conjunction with SDA to clock data into the
device. External pull-up resistor required.
28
A0
Logic Input. Address pin that sets the least significant bit of the 7-bit slave address.
29
A1
Logic Input. Address pin that sets the second least significant bit of the 7-bit slave address.
30
A2
Logic Input. Address pin that sets the third least significant bit of the 7-bit slave address.
31
RESET
Active Low Logic Input. When this pin is low, all switches are open, and appropriate registers are cleared to 0.
32
GND
Ground. Reference point for all circuitry on the ADG2188.
1 It is recommended that the exposed paddle be soldered to VSS to improve heat dissipation and crosstalk.
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