參數(shù)資料
型號(hào): ADV7619KSVZ-P
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/24頁(yè)
文件大小: 0K
描述: IC RECEIVER DUAL PORT 128SMD
標(biāo)準(zhǔn)包裝: 1
系列: Advantiv®, Xpressview™
類型: 接收器
應(yīng)用: HDTV
安裝類型: 表面貼裝
封裝/外殼: 128-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 128-TQFP-EP(14x14)
包裝: 托盤
ADV7619
Data Sheet
Rev. C | Page 14 of 24
FUNCTIONAL OVERVIEW
HDMI RECEIVER
The HDMI receiver supports all mandatory and many optional
3D video formats defined in the HDMI 1.4a specification, HDTV
formats up to 2160p, and all display resolutions up to 4k × 2k
(3840 × 2160 at 30 Hz).
With the inclusion of HDCP, displays can now receive encrypted
video content. The HDMI interface of the ADV7619 allows for
authentication of a video receiver, decryption of encoded data at
the receiver, and renewability of that authentication during trans-
mission, as specified by the HDCP 1.4 specification.
The HDMI-compatible receiver on the ADV7619 allows active
equalization of the HDMI data signals. This equalization compen-
sates for the high frequency losses inherent in HDMI and DVI
cabling, especially at longer cable lengths and higher frequencies.
The HDMI-compatible receiver is capable of equalizing for cable
lengths up to 30 meters to achieve robust receiver performance.
The ADV7619 also supports TERC4 error detection, which is
used for detection of corrupted HDMI packets following a cable
disconnect.
The HDMI receiver offers advanced audio functionality. The
receiver contains an audio mute controller that can detect a variety
of conditions that may result in audible extraneous noise in the
audio output. Upon detection of these conditions, the audio signal
can be ramped down or muted to prevent audio clicks or pops.
The HDMI receiver supports the reception of all types of audio
data described in the HDMI specifications, including
LPCM (uncompressed audio)
IEC 61937 (compressed audio)
DSD audio (1-bit audio)
HBR audio (high bit rate compressed audio)
Xpressview fast switching can be implemented with full HDCP
authentication available on the background port. Synchroniza-
tion measurement and status information are available for all
HDMI inputs. HDMI receiver features include
2:1 multiplexed HDMI receiver
3D format support
297 MHz HDMI receiver
Support for 4k × 2k resolutions
Integrated equalizer for cable lengths up to 30 meters
High-bandwidth Digital Content Protection (HDCP 1.4)
(on background ports, also)
Internal HDCP keys
36-/30-bit Deep Color support (resolutions up to 1080p)
Audio sample, HBR, DSD packet support
Repeater support
Internal EDID RAM
Hot Plug assert output pin for each HDMI port
CEC controller
COMPONENT PROCESSOR (CP)
The ADV7619 has two any-to-any, 3 × 3 color space conversion
(CSC) matrices. The first CSC block is placed in front of the CP
section. The second CSC block is placed at the back of the CP
section. Each CSC enables YPrPb-to-RGB and RGB-to-YCrCb
conversions. Many other standards of color space can be imple-
mented using the color space converters.
The CP block is available only for video signals with resolution
up to 1080p Deep Color (pixel rates up to 170 MHz). For resolu-
tions higher than 1080p, the video signal bypasses the CP block
and is routed directly to the pixel bus output as two 24-bit (4:4:4)
buses running at up to 150 MHz.
CP features include
Support for 525i, 625i, 525p, 625p, 720p, 1080i, 1080p,
and many other HDTV formats
Manual adjustments including gain (contrast), offset
(brightness), hue, and saturation
Free-run output mode that provides stable timing when
no video input is present
170 MHz conversion rate, which supports RGB input
resolutions up to 1600 × 1200 at 60 Hz
Standard identification enabled by STDI block
RGB that can be color space converted to YCrCb and
decimated to a 4:2:2 format for video-centric, back-end
IC interfacing
Data enable (DE) output signal supplied for direct
connection to HDMI/DVI transmitter
OTHER FEATURES
The ADV7619 has HS, VS, FIELD, and DE output signals with
programmable position, polarity, and width.
The ADV7619 has two programmable interrupt request output
pins: INT1 and INT2 (INT2 is accessible via one of the following
pins: MCLK/INT2, SCLK/INT2, or HPA_A/INT2). The ADV7619
also features a low power power-down mode.
The main I2C address can be set to 0x98 or 0x9A. On power-up or
after a reset, the I2C address is set to 0x98 by default. The address
can be changed to 0x9A by pulling up the VS/FIELD/ALSB pin
and issuing the I2C command SAMPLE_ALSB. For more infor-
mation, see the Register Access and Serial Ports Description
section in the UG-237.
The ADV7619 is provided in a 128-lead, 14 mm × 14 mm,
RoHS-compliant TQFP_EP package and is specified over the
0°C to 70°C temperature range.
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