參數(shù)資料
型號(hào): ADV7391BCPZ
廠商: ANALOG DEVICES INC
元件分類(lèi): 顏色信號(hào)轉(zhuǎn)換
英文描述: Low Power, Chip Scale 10-Bit SD/HD Video Encoder
中文描述: COLOR SIGNAL ENCODER, QCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFSCP-32
文件頁(yè)數(shù): 85/96頁(yè)
文件大小: 1209K
代理商: ADV7391BCPZ
ADV7390/ADV7391/ADV7392/ADV7393
Table 61. 8-Bit 525i YCrCb In, YPrPb Out
Subaddress
Setting Description
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x10
Rev. 0 | Page 85 of 96
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x82
0xC9
0x8A
0x0C
Table 62. 8-Bit 525i YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Table 63. 8-Bit 525i YCrCb In, RGB Out
Subaddress
Setting Description
0x17
0x02
0x00
0x1C
0x01
0x00
0x02
0x10
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
RGB output enabled. RGB output sync
enabled.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x80
0x10
0x82
0xC9
0x8A
0x0C
Table 64. 10-Bit 525i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
0x88
0x10
10-bit input enabled.
Table 65. 10-Bit 525i YCrCb In, YPrPb Out
Subaddress
Setting
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x10
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x82
0xC9
0x88
0x8A
0x10
0x0C
Table 66. 10-Bit 525i YCrCb In, CVBS/Y-C Out
Subaddress
Setting
0x17
0x02
0x00
0x1C
0x01
0x00
0x80
0x10
Description
Software reset.
All DACs enabled. PLL enabled (16×).
SD input mode.
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
Pixel data valid. CVBS/S-Video out. SSAF
PrPb filter enabled. Active video edge
control enabled. Pedestal enabled.
10-bit input enabled.
Timing Mode 2 (Slave). HSYNC/VSYNC
synchronization.
0x82
0xCB
0x88
0x8A
0x10
0x0C
相關(guān)PDF資料
PDF描述
ADV7391BCPZ-REEL Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7391EBZ Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7392 Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7392BCPZ Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7392BCPZ-REEL Low Power, Chip Scale 10-Bit SD/HD Video Encoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7391BCPZ-REEL 功能描述:IC VIDEO ENCODER SD/HD 32-LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編碼器,解碼器,轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源,模擬:- 電壓 - 電源,數(shù)字:- 安裝類(lèi)型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7391EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7391WBCPZ 制造商:Analog Devices 功能描述:
ADV7391WBCPZ-RL 制造商:Analog Devices 功能描述:
ADV7392 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder