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參數資料
| 型號： | ADV7343BSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| 中文描述： | SERIAL INPUT LOADING, 11-BIT DAC, QFP64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁數： | 55/88頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | ADV7343BSTZ |
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ADV7342/ADV7343
SD HUE ADJUST CONTROL
Subaddress 0xA0
When enabled, the SD hue adjust control register (Subaddress
0xA0) is used to adjust the hue on the SD composite and chroma
outputs. This feature can be enabled using Subaddress 0x87, Bit 2.
Subaddress 0xA0 contains the bits required to vary the hue of
the video data, that is, the variance in phase of the subcarrier
during active video with respect to the phase of the subcarrier
during the color burst. The ADV7342/ADV7343 provide a
range of ±22.5° in increments of 0.17578125°. For normal
operation (zero adjustment), this register is set to 0x80. Values
0xFF and 0x00 represent the upper and lower limits, respectively,
of the attainable adjustment in NTSC mode. Values 0xFF and
0x01 represent the upper and lower limits, respectively, of the
attainable adjustment in PAL mode.
The hue adjust value is calculated using the following equation:
Hue Adjust
(°) = 0.17578125° (
HCR
d
128)
where
HCR
d
is the hue adjust control register (decimal)
For example, to adjust the hue by +4°, write 0x97 to the hue
adjust control register.
Rev. 0 | Page 55 of 88
97
x
0
151
128
17578125
.
4
=
≈
+
d
where the sum is rounded to the nearest integer.
To adjust the hue by 4°, write 0x69 to the hue adjust control
register.
9
6
x
0
105
128
17578125
.
4
=
≈
+
d
where the sum is rounded to the nearest integer.
SD BRIGHTNESS DETECT
Subaddress 0xBA
The ADV7342/ADV7343 allow monitoring of the brightness
level of the incoming video data. The SD brightness detect
register (Subaddress 0xBA) is a read-only register.
SD BRIGHTNESS CONTROL
Subaddress 0xA1, Bits[6:0]
When this feature is enabled, the SD brightness/WSS control
register (Subaddress 0xA1) is used to control brightness by
adding a programmable setup level onto the scaled Y data. This
feature can be enabled using Subaddress 0x87, Bit 3.
For NTSC with pedestal, the setup can vary from 0 IRE to 22.5 IRE.
For NTSC without pedestal and for PAL, the setup can vary
from 7.5 IRE to +15 IRE.
The SD brightness control register is an 8-bit register. The seven
LSBs of this 8-bit register are used to control the brightness
level, which can be a positive or negative value.
For example, to add +20 IRE brightness level to an NTSC signal
with pedestal, write 0x28 to Subaddress 0xA1.
0 ×
(SD Brightness Value)
=
0 × (
IRE Value
× 2.015631) =
0 × (20 × 2.015631) = 0 × (40.31262) ≈ 0x28
To add –7 IRE brightness level to a PAL signal, write 0x72 to
Subaddress 0xA1.
0 × (
SD Brightness Value
) =
0 × (
IRE Value
× 2.075631) =
0 × (7 × 2.015631) = 0x(14.109417) ≈ 0001110b
0001110b
into twos complement
= 1110010b = 0x72
Table 45. Sample Brightness Control Values
1
Setup Level
(NTSC) with
Pedestal
Without
Pedestal
22.5 IRE
15 IRE
15 IRE
7.5 IRE
7.5 IRE
0 IRE
0 IRE
7.5 IRE
Setup Level
(NTSC)
Setup
Level
(PAL)
Brightness
Control
Value
0x1E
0x0F
0x00
0x71
15 IRE
7.5 IRE
0 IRE
7.5 IRE
1
Values in the range of 0x3F to 0x44 could result in an invalid output signal.
SD INPUT STANDARD AUTO DETECTION
Subaddress 0x87, Bit 5
The ADV7342/ADV7343 include an SD input standard auto-
detect feature. This SD feature can be enabled by setting
Subaddress 0x87, Bit 5 to 1.
When enabled, the ADV7342/ADV7343 can automatically
identify an NTSC or PAL B/D/G/H/I input stream. The
ADV7342/ADV7343 automatically update the subcarrier
frequency registers with the appropriate value for the identified
standard. The ADV7342/ADV7343 are also configured to
correctly encode the identified standard.
The SD standard bits (Subaddress 0x80, Bits[1:0]) and the
subcarrier frequency registers are not updated to reflect the
identified standard. All registers retain their default or user-
defined values.
NTSC WITHOUT PEDESTAL
NO SETUP
VALUE ADDED
POSITIVE SETUP
VALUE ADDED
100 IRE
0 IRE
NEGATIVE SETUP
VALUE ADDED
–7.5 IRE
+7.5 IRE
0
Figure 68. Examples of Brightness Control Values
相關PDF資料 |
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| ADV7342 | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7342BSTZ | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7343 | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
| ADV7344 | Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7343WBSTZ | 功能描述:IC ENCODER VID 12BIT DAC 64LQFP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:視頻編碼器 應用:DVD，Blu-Ray 電壓 - 電源，模擬:2.6 V ~ 3.46 V 電壓 - 電源，數字:1.71 V ~ 1.89 V 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商器件封裝:64-LQFP（10x10） 標準包裝:1 |
| ADV7343WBSTZ-RL | 功能描述:Video Encoder IC DVD, Blu-Ray 64-LQFP (10x10) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:視頻編碼器 應用:DVD，Blu-Ray 電壓 - 電源，模擬:2.6 V ~ 3.46 V 電壓 - 電源，數字:1.71 V ~ 1.89 V 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商器件封裝:64-LQFP（10x10） 標準包裝:1,500 |
| ADV7344 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs |
| ADV7344BSTZ | 制造商:Analog Devices 功能描述: |
| ADV73505501 | 制造商:LG Corporation 功能描述:Frame Assembly |
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