參數(shù)資料
型號(hào)： ADV7342
廠商： Analog Devices, Inc.
英文描述： Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
中文描述： 六多格式視頻編碼器，11位，297兆赫數(shù)模轉(zhuǎn)換器
文件頁數(shù)： 18/88頁
文件大小： 1053K
代理商： ADV7342
ADV7342/ADV7343
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 18 of 88
64
G
63
C
62
S
61
S
60
S
59
S
58
S
57
D
56
V
D
55
S
54
S
53
S
52
T
51
T
50
S
49
S
47
R
SET1
46
V
REF
45
COMP1
42
DAC 3
43
DAC 2
44
DAC 1
48
SFL/MISO
41
V
AA
40
AGND
39
DAC 4
37
DAC 6
36
R
SET2
35
COMP2
34
PV
DD
33
EXT_LF1
38
DAC 5
2
TEST0
3
TEST1
4
Y0
7
Y3
6
Y2
5
Y1
1
V
DD_IO
8
Y4
9
Y5
10
V
DD
12
Y6
13
Y7
14
TEST2
15
TEST3
16
C0
11
DGND
17
C
18
C
19
A
20
S
21
S
22 23
P
24
P
25
P
26
C
C
27
C
28
C
29
C
30
C
31
32
P
PIN 1
ADV7342/ADV7343
TOP VIEW
(Not to Scale)
E
0
Figure 21. Pin Configuration
Table 13. Pin Function Descriptions
Pin No.
13, 12,
9 to 4
29 to 25,
18 to 16
62 to 58,
55 to 53
52, 51, 15,
14, 3, 2
30
63
Mnemonic
Y7 to Y0
Input/
Output
I
Description
8-Bit Pixel Port. Y0 is the LSB. Refer to Table 31 for input modes.
C7 to C0
I
8-Bit Pixel Port. C0 is the LSB. Refer to Table 31 for input modes.
S7 to S0
I
8-Bit Pixel Port. S0 is the LSB. Refer to Table 31 for input modes.
TEST5 to
TEST0
CLKIN_A
CLKIN_B
I
Unused. These pins should be connected to DGND.
I
I
Pixel Clock Input for HD Only (74.25 MHz), ED
1
Only (27 MHz or 54 MHz) or SD Only (27 MHz).
Pixel Clock Input for Dual Modes Only. Requires a 27 MHz reference clock for ED operation or a
74.25 MHz reference clock for HD operation.
SD Horizontal Synchronization Signal. This pin can also be configured to output an SD, ED, or HD
horizontal synchronization signal. See the External Horizontal and Vertical Synchronization
Control section.
SD Vertical Synchronization Signal. This pin can also be configured to output an SD, ED, or HD
vertical synchronization signal. See the External Horizontal and Vertical Synchronization Control
section.
ED/HD Horizontal Synchronization Signal. See the External Horizontal and Vertical
Synchronization Control section.
ED/HD Vertical Synchronization Signal. See the External Horizontal and Vertical Synchronization
Control section.
ED/HD Blanking Signal. See the External Horizontal and Vertical Synchronization Control section.
Multifunctional Pin: Subcarrier Frequency Lock (SFL) Input/SPI Data Output. The SFL input is
used to drive the color subcarrier DDS system, timing reset, or subcarrier reset.
This pin is used to control the amplitudes of the DAC 1, DAC 2, and DAC 3 outputs. For full-drive
operation (for example, into a 37.5 Ω load), a 510 Ω resistor must be connected from R
SET1
to
AGND. For low drive operation (for example, into a 300 Ω load), a 4.12 kΩ resistor must be
connected from R
SET1
to AGND.
50
S_HSYNC
I/O
49
S_VSYNC
I/O
22
P_HSYNC
I
23
P_VSYNC
I
24
48
P_BLANK
SFL/MISO
I
I/O
47
R
SET1
I
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7342BSTZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7343 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7343BSTZ 功能描述:IC ENCODER VIDEO W/DAC 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7343WBSTZ 功能描述:IC ENCODER VID 12BIT DAC 64LQFP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:視頻編碼器 應(yīng)用:DVD，Blu-Ray 電壓 - 電源，模擬:2.6 V ~ 3.46 V 電壓 - 電源，數(shù)字:1.71 V ~ 1.89 V 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商器件封裝:64-LQFP（10x10） 標(biāo)準(zhǔn)包裝:1
ADV7343WBSTZ-RL 功能描述:Video Encoder IC DVD, Blu-Ray 64-LQFP (10x10) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:視頻編碼器 應(yīng)用:DVD，Blu-Ray 電壓 - 電源，模擬:2.6 V ~ 3.46 V 電壓 - 電源，數(shù)字:1.71 V ~ 1.89 V 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商器件封裝:64-LQFP（10x10） 標(biāo)準(zhǔn)包裝:1,500
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