- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374047 > ADV7340BSTZ (ANALOG DEVICES INC) Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS PDF資料下載
參數(shù)資料
| 型號： | ADV7340BSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| 中文描述： | SERIAL INPUT LOADING, 12-BIT DAC, PQFP64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 70/88頁 |
| 文件大小： | 1066K |
| 代理商： | ADV7340BSTZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁當(dāng)前第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
ADV7340/ADV7341
APPENDIX 1—COPY GENERATION MANAGEMENT SYSTEM
SD CGMS
Subaddress 0x99 to Subaddress 0x9B
The ADV7340/ADV7341 support copy generation management
system (CGMS) conforming to the EIAJ CPR-1204 and ARIB
TR-B15 standards. CGMS data is transmitted on Line 20 of the
odd fields and Line 283 of even fields. Subaddress 0x99,
Bits[6:5] control whether CGMS data is output on odd or even
fields or both.
SD CGMS data can only be transmitted when the ADV7340/
ADV7341 are configured in NTSC mode. The CGMS data is 20
bits long. The CGMS data is preceded by a reference pulse of
the same amplitude and duration as a CGMS bit (see Figure 91).
ED CGMS
Subaddress 0x41 to Subaddress 0x43
Subaddress 0x5E to Subaddress 0x6E
525p
The ADV7340/ADV7341 support copy generation management
system (CGMS) in 525p mode in accordance with EIAJ CPR-
1204-1.
When ED CGMS is enabled (Subaddress 0x32, Bit 6 = 1), 525p
CGMS data is inserted on Line 41. The 525p CGMS data
registers are at Subaddress 0x41, Subaddress 0x42, and
Subaddress 0x43.
The ADV7340/ADV7341 also support CGMS Type B packets in
525p mode in accordance with CEA-805-A.
When ED CGMS Type B is enabled (Subaddress 0x5E, Bit 0 =
1), 525p CGMS Type B data is inserted on Line 40. The 525p
CGMS Type B data registers are at Subaddress 0x5E to
Subaddress 0x6E.
625p
The ADV7340/ADV7341 support copy generation management
system (CGMS) in 625p mode in accordance with IEC62375
(2004).
When ED CGMS is enabled (Subaddress 0x32, Bit 6 = 1), 625p
CGMS data is inserted on Line 43. The 625p CGMS data
registers are at Subaddress 0x42 and Subaddress 0x43.
HD CGMS
Subaddress 0x41 to Subaddress 0x43
Subaddress 0x5E to Subaddress 0x6E
The ADV7340/ADV7341 support copy generation management
system (CGMS) in HD mode (720p and 1080i) in accordance
with EIAJ CPR-1204-2.
Rev. 0 | Page 70 of 88
When HD CGMS is enabled (Subaddress 0x32, Bit 6 = 1), 720p
CGMS data is applied to Line 24 of the luminance vertical
blanking interval.
When HD CGMS is enabled (Subaddress 0x32, Bit 6 = 1), 1080i
CGMS data is applied to Line 19 and Line 582 of the luminance
vertical blanking interval.
The HD CGMS data registers are at Subaddress 0x41,
Subaddress 0x42, and Subaddress 0x43.
The ADV7340/ADV7341 also support CGMS Type B packets in
HD mode (720p and 1080i) in accordance with CEA-805-A.
When HD CGMS Type B is enabled (Subaddress 0x5E, Bit 0 =
1), 720p CGMS data is applied to Line 23 of the luminance
vertical blanking interval.
When HD CGMS Type B is enabled (Subaddress 0x5E, Bit 0 =
1), 1080i CGMS data is applied to Line 18 and Line 581 of the
luminance vertical blanking interval.
The HD CGMS Type B data registers are at Subaddress 0x5E to
Subaddress 0x6E.
CGMS CRC FUNCTIONALITY
If SD CGMS CRC (Subaddress 0x99, Bit 4) or ED/HD CGMS
CRC (Subaddress 0x32, Bit 7) is enabled, the upper six CGMS
data bits, C19 to C14, which comprise the 6-bit CRC check
sequence, are automatically calculated on the
ADV7340/ADV7341. This calculation is based on the lower 14
bits (C13 to C0) of the data in the CGMS data registers and the
result is output with the remaining 14 bits to form the complete
20 bits of the CGMS data. The calculation of the CRC sequence
is based on the polynomial x
6
+ x + 1 with a preset value of 111111.
If SD CGMS CRC or ED/HD CGMS CRC are disabled, all
20 bits (C19 to C0) are output directly from the CGMS registers
(CRC must be calculated by the user manually).
If ED/HD CGMS Type B CRC (Subaddress 0x5E, Bit 1) is
enabled, the upper six CGMS Type B data bits (P122 to P127)
that comprise the 6-bit CRC check sequence are automatically
calculated on the ADV7340/ADV7341. This calculation is
based on the lower 128 bits (H0 to H5 and P0 to P121) of the
data in the CGMS Type B data registers. The result is output
with the remaining 128 bits to form the complete 134 bits of the
CGMS Type B data. The calculation of the CRC sequence is
based on the polynomial x
6
+ x + 1 with a preset value of
111111.
If ED/HD CGMS Type B CRC is disabled, all 134 bits (H0 to H5
and P0 to P127) are output directly from the CGMS Type B
registers (CRC must be calculated by the user manually).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7340EBZ | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7341 | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7341BSTZ | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7341EBZ | Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7343BSTZ | Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7340EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7341 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7341BSTZ | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 12-Bit 64-Pin LQFP Tray 制造商:Analog Devices 功能描述:MULTI-FORMAT VIDEO ENCODER SIX 12-BIT NOISE SHAPED VIDEO DAC - Bulk |
| ADV7341EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS |
| ADV7342 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。