參數(shù)資料
型號(hào)： ADV7340BSTZ
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
中文描述： SERIAL INPUT LOADING, 12-BIT DAC, PQFP64
封裝： ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁(yè)數(shù)： 64/88頁(yè)
文件大小： 1066K
代理商： ADV7340BSTZ
ADV7340/ADV7341
EXTERNAL HORIZONTAL AND VERTICAL SYNCHRONIZATION CONTROL
For synchronization purposes, the ADV7340/ADV7341 are able to accept either time codes embedded in the input pixel data or external
synchronization signals provided on the S_HSYNC, S_VSYNC, P_HSYNC, P_VSYNC, and P_BLANK pins (see Table 49). It is also
possible to output synchronization signals on the S_HSYNC and S_VSYNC pins (see Table 50 to Table 52).
Rev. 0 | Page 64 of 88
Table 49. Timing Synchronization Signal Input Options
Signal
Pin
SD HSYNC In
S_HSYNC
SD VSYNC In
S_VSYNC
ED/HD HSYNC In
P_HSYNC
ED/HD VSYNC In
P_VSYNC
ED/HD BLANK In
P_BLANK
Condition
SD Slave Timing Mode 1, 2, or 3 selected (Subaddress 0x8A[2:0]).
1
SD Slave Timing Mode 1, 2, or 3 selected (Subaddress 0x8A[2:0]).
1
ED/HD Timing Sync. Inputs enabled (Subaddress 0x30, Bit 2 = 0).
ED/HD Timing Sync. Inputs enabled (Subaddress 0x30, Bit 2 = 0).
1
SD and ED/HD timing sync. Outputs must also be disabled (Subaddress 0x02[7:6] = 00).
Table 50. Timing Synchronization Signal Output Options
Signal
Pin
SD HSYNC Out
S_HSYNC
SD VSYNC Out
S_VSYNC
ED/HD HSYNC Out
S_HSYNC
ED/HD VSYNC Out
S_VSYNC
Condition
SD Timing Sync. Outputs enabled (Subaddress 0x02, Bit 6 = 1).
1
SD Timing Sync. Outputs enabled (Subaddress 0x02, Bit 6 = 1).
1
ED/HD Timing Sync. Outputs enabled (Subaddress 0x02, Bit 7 = 1).
ED/HD Timing Sync. Outputs enabled (Subaddress 0x02, Bit 7 = 1).
1
ED/HD timing sync. Outputs must also be disabled (Subaddress 0x02, Bit 7 = 0).
Table 51. HSYNC Output Control
1
ED/HD Input Sync
Format (0x30, Bit 2)
x
x
ED/HD HSYNC
Control
(0x34, Bit 1)
x
x
ED/HD Sync
Output Enable
(0x02, Bit 7)
0
0
SD Sync
Output Enable
(0x02, Bit 6)
0
1
Signal on S_HSYNC Pin
Tristate.
Pipelined SD HSYNC.
Duration
–
See
Appendix 5—
SD Timing
.
As per HSYNC
timing.
Same as line
blanking interval.
Same as embedded
HSYNC.
0
0
1
x
Pipelined ED/HD HSYNC.
1
0
1
x
Pipelined ED/HD HSYNC based
on AV Code H bit.
Pipelined ED/HD HSYNC based
on horizontal counter.
x
1
1
x
1
In all ED/HD standards where there is a HSYNC output, the start of the HSYNC pulse is aligned with the falling edge of the embedded HSYNC in the output video.
Table 52. VSYNC Output Control
1
ED/HD Input
Sync Format
(0x30, Bit 2)
(0x34, Bit 2)
x
X
x
X
ED/HD VSYNC
Control
ED/HD Sync
Output Enable
(0x02, Bit 7)
0
0
SD Sync
Output Enable
(0x02, Bit 6)
0
1
Video Standard
x
Interlaced
Signal on S_VSYNC Pin
Tristate.
Pipelined SD VSYNC/Field.
Duration
–
See
Appendix 5—
SD Timing
.
As per VSYNC or
field signal timing.
Field.
0
0
1
x
x
Pipelined ED/HD VSYNC
or field signal.
Pipelined field signal
based on AV Code F bit.
Pipelined VSYNC based on
AV Code V bit.
Pipelined ED/HD VSYNC
based on vertical counter.
Pipelined ED/HD VSYNC
based on vertical counter.
1
0
1
x
All HD interlaced
standards
All ED/HD progressive
standards
All ED/HD standards
except 525p
525p
1
0
1
x
Vertical blanking
interval.
Aligned with
serration lines.
Vertical blanking
interval.
x
1
1
x
x
1
1
x
1
In all ED/HD standards where there is a VSYNC output, the start of the VSYNC pulse is aligned with the falling edge of the embedded VSYNC in the output video.
相關(guān)PDF資料
PDF描述
ADV7340EBZ Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7341 Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7341BSTZ Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
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ADV7340EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7341 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7341BSTZ 制造商:Analog Devices 功能描述:Video Encoder 6DAC 12-Bit 64-Pin LQFP Tray 制造商:Analog Devices 功能描述:MULTI-FORMAT VIDEO ENCODER SIX 12-BIT NOISE SHAPED VIDEO DAC - Bulk
ADV7341EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7342 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
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