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參數(shù)資料
| 型號： | ADV7150LS170 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顯示控制器 |
| 英文描述： | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
| 中文描述： | PALETTE-DAC DSPL CTLR, PQFP160 |
| 封裝： | POWER, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 18/36頁 |
| 文件大?。?/td> | 447K |
| 代理商： | ADV7150LS170 |
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ADV7150
–18–
REV. A
30
MPU PORT
D9 – D0
10 (8+2)
C0
C1
ADDR
(A7–A0)
REVISION
REGISTER
COMMAND
REGISTERS
(CR1–CR3)
TEST
REGISTERS
(MR1)
DATA TO
PALETTES
CONTROL REGISTERS
COLOR REGISTERS
ADDRESS
REGISTER
MODE
REGISTER
ID
REGISTER
BLUE
REGISTER
PIXEL MASK
REGISTER
CE
R/W
GREEN
REGISTER
RED
REGISTER
Figure 27. MPU Port and Register Configuration
Data is read from the color palette by first writing to the address
register of the color palette location to be read. T he MPU per-
forms three successive read cycles from each of the red, green
and blue locations (10-bit or 8-bit) of the RAM. An internal
pointer moves from red to green to blue after each read is com-
pleted. T his pointer is reset to red after a blue read or whenever
the address register is written. T he address register then auto-
matically increments to point to the next RAM location, and a
similar red, green and blue palette read sequence is performed.
T he address register resets to 00H following a blue read cycle of
color palette RAM location FFH.
Register Accesses
T he MPU can write to or read from all of the ADV7150s regis-
ters. C0 and C1 determine whether the Mode Register or Ad-
dress Register is being accessed. Access to these registers is
direct. T he Control Registers are accessed indirectly. T he
Address Register must point to the desired Control Register.
Figure 28 along with the 8-bit and 10-bit Interface T ruth T ables
illustrate the structure and protocol for device communication
over the MPU port.
MODE REGISTER
(MR17–MR10)
ADDRESS REGISTER
(A7–A0)
ADDRESS
REGISTER
(A15–A0)
CONTROL
REGISTERS
00H
01H
02H
PIXEL TEST REGISTER
R G B
DAC TEST REGISTER
R G B
* THIS REGISTER IS READ ONLY.
A READ CYCLE WILL RETURN ZEROS "00".
LOOK-UP TABLE RAM
(256 x 30)
RED
REGISTER
(R9–R0)
GREEN
REGISTER
(G9–G0)
BLUE
REGISTER
(B9–B0)
POINTS TO LOCATION
CORRESPONDING TO
ADDRESS REG (A7–A0)
ADDRESS REG = ADDRESS REG + 1
C1 = 1
C0 = 0
C1 = 0
C0 = 1
C1 = 1
C0 = 1
C1 = 0
C0 = 0
SYNC, BLANK & I
PLL
TEST REGISTER
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
RESERVED* (READ ONLY)
RESERVED* (READ ONLY)
RESERVED* (READ ONLY)
REVISION REGISTER
ID REGISTER (READ ONLY)
PIXEL MASK REGISTER
COMMAND REGISTER 1
COMMAND REGISTER 2
COMMAND REGISTER 3
Figure 28. Internal Register Configuration and Address Decoding
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7150LS220 | 制造商:Analog Devices 功能描述: |
| adv7150ls85 | 制造商:Rochester Electronics LLC 功能描述:220MHZ 3X10 BIT VIDEO DAC - Bulk 制造商:Analog Devices 功能描述: |
| ADV7151 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS 220 MHz Pseudo-Color Graphics Triple 10-Bit Video RAM-DAC |
| ADV7151KS110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7151KS135 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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