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參數(shù)資料
| 型號(hào)： | ADV7150LS110 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顯示控制器 |
| 英文描述： | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
| 中文描述： | PALETTE-DAC DSPL CTLR, PQFP160 |
| 封裝： | POWER, PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 17/36頁(yè) |
| 文件大?。?/td> | 447K |
| 代理商： | ADV7150LS110 |
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ADV7150
–17–
REV. A
R4
R3
R2
R1
R0
G4
G2
G3
x
G1
G0
G4
B4
B3
B2
B1
x
x
x
x
x
x
x
x
PIXEL
INPUT
DATA
LOCATION "0"
LOCATION "31"
256 x 10
RAM
(RED LUT)
10
TO
RED
DAC
0
0
0
R4
R3
R2
R1
R0
LOCATION "0"
LOCATION "31"
256 x 10
RAM
(GREEN LUT)
10
TO
GREEN
DAC
0
0
0
G4
G3
G2
G1
G0
LOCATION "0"
LOCATION "31"
256 x 10
RAM
(BLUE LUT)
10
TO
BLUE
DAC
0
0
0
B4
B3
B2
B1
B0
5
5
5
PIN
ASSIGN-
MENTS
DATA
LATCHED
TO
PIXEL
PORT
DATA LATCHES
FIRST 32
LOCATIONS
OF RAM
DATA
INTERNALLY
SHIFTED
TO 5 LSBS
B5
B4
B3
B2
B1
B0
x
x
x
x
x
x
x
x
B6
B7
G6
G5
G4
G3
G2
G1
G0
R6
R5
R4
R3
R2
R1
R0
R4
R3
R2
R1
R0
G4
G3
G2
x
G1
G0
B4
B3
B2
B1
B0
G7
R7
Figure 26. 15-Bit True-Color Mapping Using R0–R7 and
G0–G6
T he part has two modes of operation for 15-bit T rue Color. In
the first mode, data is input to the device over the red, green
and blue channel (R3–R7, G3–G7 and B3–B7) and is internally
mapped to locations 0 to 31 of the Look-Up T able (LUT ) ac-
cording to Figure 25. In the second mode, data is input to the
device over just two of the color ports, red and green (R0–R7
and G0–G6) and is internally mapped to LUT locations 0 to 31
according to Figure 26. (Note: Data on unused pixel inputs is
ignored.)
MICROPROCE SSOR (MPU) PORT
T he ADV7150 supports a standard MPU Interface. All the
functions of the part are controlled via this MPU port. Direct
access is gained to the Address Register, Mode Register and all
the Control Registers as well as the Color Palette. T he following
sections describe the setup for reading and writing to all of the
devices registers.
MPU Interface
T he MPU interface (Figure 27) consists of a bidirectional,
10-bit wide databus and interface control signals
CE
, C0, C1
and R/
W
. T he 10-bit wide databus is user configurable as
illustrated.
T able II. Databus Width T able
Databus
Width
RAM/DAC
Resolution
Read/Write
Mode
10-Bit
10-Bit
8-Bit
8-Bit
10-Bit
8-Bit
10-Bit
8-Bit
10-Bit Parallel
8-Bit Parallel
8+2 Byte
8-Bit Parallel
Register Mapping
T he ADV7150 contains a number of onboard registers includ-
ing the Mode Register (MR17–MR10), Address Register (A7–
A0) and nine Control Registers as well as Red (R9–R0), Green
(G9–G0) and Blue (B9–B0) Color Registers. T hese registers
control the entire operation of the part. Figure 28 shows the
internal register configuration.
Control lines C1 and C0 determine which register the MPU is
accessing. C1 and C0 also determine whether the Address Reg-
ister is pointing to the color registers and look-up table RAM or
the control registers. If C1, C0 = 1, 0 the MPU has access to
whatever control register is pointed to by the Address Register
(A7–A0). If C1, C0 = 0, 1 the MPU has access to the Look-Up
T able RAM (Color Palette) through the associated color regis-
ters. T he
CE
input latches data to or from the part.
T he R/
W
control input determines between read or write ac-
cesses. T he T ruth T ables III and IV show all modes of access to
the various registers and color palette for both the 8-bit wide
databus configuration and 10-bit wide databus configuration. It
should be noted that after power-up, the devices MPU port is
automatically set to 10-bit wide operation (see Power-On Reset
section).
Color Palette Accesses
Data is written to the color palette by first writing to the address
register of the color palette location to be modified. T he MPU
performs three successive write cycles for each of the red, green
and blue registers (10-bit or 8-bit). An internal pointer moves
from red to green to blue after each write is completed. T his
pointer is reset to red after a blue write or whenever the address
register is written. During the blue write cycle, the three bytes of
red, green and blue are concatenated into a single 30-bit/24-bit
word and written to the RAM location as specified in the ad-
dress register (A7–A0). T he address register then automatically
increments to point to the next RAM location and a similar red,
green and blue palette write sequence is performed. T he address
register resets to 00H following a blue write cycle to color pal-
ette RAM location FFH.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7150LS135 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| ADV7150LS220 | 制造商:Analog Devices 功能描述: |
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