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參數(shù)資料
| 型號： | ADV3228ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CROSSPOINT SW 16X8 72LFCSP |
| 標準包裝： | 1 |
| 功能： | 交叉點開關 |
| 電路： | 1 x 8:8 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±5V |
| 電流 - 電源： | 52mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 72-LFCSP-VQ（10x10） |
| 包裝： | 托盤 |
ADV3228/ADV3229
Rev. 0 | Page 23 of 24
using parallel programming. In parallel mode, the CLK pin is
level sensitive, whereas in serial mode, it is edge triggered.
POWER-ON RESET
When powering up the ADV3228/ADV3229, it is usually desirable
to have the outputs come up in the disabled state. When taken
low, the RESET pin causes all outputs to be in the disabled state.
However, the RESET signal does not reset all registers in the
ADV3228/ADV3229. This is important when operating in the
parallel programming mode. Refer to the
section for information about programming internal registers
after power-up. Serial programming programs the entire matrix
each time; therefore, no special considerations apply.
Because the data in the shift register is random after power-up,
it should not be used to program the matrix, or the matrix can
enter unknown states. To prevent the matrix from entering
unknown states, do not apply logic low signals to both CE and
UPDATE initially after power-up. Instead, first load the shift
register with the data and then take UPDATE low to program
the device.
The RESET pin has a 20 kΩ pull-up resistor to DVCC that can
be used to create a simple power-up reset circuit. A capacitor from
RESET to ground holds the RESET pin low for a period during
which the rest of the device stabilizes. The low condition causes
all of the outputs to be disabled. The capacitor then charges
through the pull-up resistor to the high state, thereby, allowing
full programming capability of the device.
GAIN SELECTION
The 8 × 8 crosspoints come in two versions, depending on
the gain of the analog circuit path. The ADV3228 device is unity
gain and can be used for analog logic switching and other
applications where unity gain is desired. The ADV3228 outputs
have very high impedance when their outputs are disabled.
The ADV3229 can be used for devices that drive a terminated
cable with its outputs. This device has a built-in gain of +2 that
eliminates the need for a gain of +2 buffer to drive a video line. Its
high output disabled impedance minimizes signal degradation
when paralleling additional outputs of other crosspoint devices.
CREATING LARGER CROSSPOINT ARRAYS
The ADV3228/ADV3229 are high density building blocks for
creating crosspoint arrays of dimensions larger than 8 × 8. Various
features, such as output disable, chip enable, and gain of +1 and
gain of +2 options, are useful for creating larger arrays.
The first consideration in constructing a larger crosspoint is to
determine the minimum number of devices that is required. The 8
× 8 architecture of the ADV3228/ADV3229 contains 64 points,
which is a factor of 16 greater than a 4 × 1 crosspoint (or multiplexer).
The benefits realized in printed circuit board (PCB) area used,
power consumption, and design effort are readily apparent when
compared to using multiples of these smaller 4 × 1 devices.
To obtain the minimum number of required points for a non-
blocking crosspoint, multiply the number of inputs by the number
of outputs. Nonblocking requires that the programming of a given
input to one or more outputs not restrict the availability of that input
to be a source for any other outputs. Some nonblocking crosspoint
architectures require more than this minimum. In addition, there
are blocking architectures that can be constructed with fewer
devices than this minimum. These systems have connectivity
available on a statistical basis that is determined when designing
the overall system.
The basic concept in constructing larger crosspoint arrays is to
connect inputs in parallel in a horizontal direction and to wire-OR
the outputs together in the vertical direction. The wire-OR
connection can be viewed as a tristate multiplex of the two outputs,
in that only one output is enabled and the other is in a high-Z state.
The meaning of horizontal and vertical can best be understood
by referring to Figure 65, which illustrates this concept for a 32 × 8
crosspoint array that uses four ADV3228 or ADV3229 devices.
IN00 TO IN07
OUT00 TO OUT07
ADV3228
OR
ADV3229
8
RTERM
IN08 TO IN15
ADV3228
OR
ADV3229
8
RTERM
IN16 TO IN23
ADV3228
OR
ADV3229
8
RTERM
IN24 TO IN31
ADV3228
OR
ADV3229
8
RTERM
09
31
8-
0
07
Figure 65. A 32 × 8 Nonblocking Crosspoint Switch Array
Each input is uniquely assigned to each of the eight inputs of the
four devices and terminated appropriately; the outputs are wired-
OR’ed together. The output from only one wire-OR’ed connection
can be enabled at any given time, and care must be exercised to
minimize load capacitance at the wired-OR’ed connections. The
device programming software must be properly written to prevent
multiple connected outputs from being enabled at the same time.
More expansion options are possible using the ADV3226 and
16 × 8 arrays. Also available are 32 × 16 arrays in a single package:
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV3229ACPZ | 功能描述:IC CROSSPOINT SW 16X8 72LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關，多路復用器，多路分解器 系列:- 應用說明:Ultrasound Imaging Systems Application Note 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 功能:開關 電路:單刀單擲 導通狀態(tài)電阻:48 歐姆 電壓電源:單電源 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電流 - 電源:5µA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應商設備封裝:48-LQFP（7x7） 包裝:托盤 |
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| ADV32368102 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV32368601 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV32369201 | 制造商:LG Corporation 功能描述:Frame Assembly |
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