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| 型號： | ADUC836BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter, Dual 16-Bit-ADCs with Embedded 62 kB Flash MCU |
| 中文描述： | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, QCC56 |
| 封裝： | 8 X 8 MM, ROHS COMPLIANT, MO-220-VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 40/80頁 |
| 文件大小： | 5913K |
| 代理商： | ADUC836BCP |
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ADuC836
–40–
TIME INTERVAL COUNTER (WAKE-UP/RTC TIMER)
A time interval counter (TIC) is provided on-chip for:
Periodically waking up the part from power-down
Implementing a real-time clock
Counting longer intervals than the standard 8051 compatible
timers are capable of
The TIC is capable of timeout intervals ranging from 1/128th
second to 255 hours. Furthermore, this counter is clocked by the
crystal oscillator rather than the by PLL, and thus has the ability to
remain active in Power-Down mode and time long power-down
intervals. This has obvious applications for remote battery-powered
sensors where regular widely, spaced readings are required.
The TIC counter can easily be used to generate a real-time
clock. The hardware will count in seconds, minutes, and hours;
however, user software will have to count in days, months, and
years. The current time can be written to the timebase SFRs
(HTHSEC, SEC, MIN, and HOUR) while TCEN is low. When
the RTC timer is enabled (TCEN is set), the TCEN bit itself and
the HTHSEC, SEC, MIN, and HOUR Registers are not reset to
00H after a hardware or watchdog timer reset. This is to prevent
the need to recalibrate the real-time clock after a reset. However,
these registers will be reset to 00H after a power cycle (indepen-
dent of TCEN) or after any reset if TCEN is clear.
Six SFRs are associated with the time interval counter, TIMECON
being its control register. Depending on the configuration of the
IT0 and IT1 bits in TIMECON, the selected time counter register
overflow will clock the interval counter. When this counter is equal
to the time interval value loaded in the INTVAL SFR, the TII
bit (TIMECON.2) is set and generates an interrupt if enabled.
(See IEIP2 SFR description under the Interrupt System section.)
If the ADuC836 is in Power-Down mode, again with TIC inter-
rupt enabled, the TII bit will wake up the device and resume
code execution by vectoring directly to the TIC interrupt service
vector address at 0053H. The TIC-related SFRs are described in
Table XVIII with a block diagram of the TIC shown in Figure 33.
8-BIT
PRESCALER
HUNDREDTHS COUNTER
HTHSEC
SECOND COUNTER
SEC
MINUTE COUNTER
MIN
HOUR COUNTER
HOUR
TIEN
INTERVAL TIMEOUT
TIME INTERVAL COUNTER INTERRUPT
8-BIT
INTERVAL COUNTER
INTVAL SFR
INTERVAL
TIMEBASE
SELECTION
MUX
TCEN
32.768kHz EXTERNAL CRYSTAL
ITS0, 1
EQUAL
Figure 33. TIC, Simplified Block Diagram
Table XVIII. TIMECON SFR Bit Designations
Bit Name
7 –––
6 –––
5 ITS1
4 ITS0
Description
Reserved for Future Use
Reserved for Future Use. For future product code compatibility, this bit should be written as a 1.
Interval Timebase Selection Bits.
Written by user to determine the interval counter update rate.
ITS1 ITS0 Interval Timebase
0 0 1/128 Second
0 1 Seconds
1 0 Minutes
1 1 Hours
Single Time Interval Bit.
Set by user to generate a single interval timeout. If set, a timeout will clear the TIEN bit.
Cleared by user to allow the interval counter to be automatically reloaded and start counting again at each interval
timeout.
TIC Interrupt Bit.
Set when the 8-bit interval counter matches the value in the INTVAL SFR.
Cleared by user software.
Time Interval Enable Bit.
Set by user to enable the 8-bit time interval counter.
Cleared by user to disable and clear the contents of the 8-bit interval counter. To ensure that the 8-bit interval
counter is cleared, TIEN must be held low for at least 30.5
s (32 kHz).
Time Clock Enable Bit.
Set by user to enable the time clock to the time interval counters.
Cleared by user to disable the 32 kHz clock to the TIC and clear the 8-bit prescaler and the HTHSEC, SEC,
MIN, and HOURS SFRs. To ensure that these registers are cleared, TCEN must be held low for at least 30.5
s
(32 kHz). The time registers (HTHSEC, SEC, MIN, and HOUR) can be written only while TCEN is low.
3 STI
2 TII
1 TIEN
0 TCEN
REV. A
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| ADUC836BCPZ | 功能描述:IC MCU 62K FLASH ADC/DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標(biāo)準(zhǔn)包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
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