參數(shù)資料
型號: ADUC831BS
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: MicroConverter, 12-Bit ADCs and DACs with Embedded 62 kBytes Flash MCU
中文描述: 8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP52
封裝: PLASTIC, MQFP-52
文件頁數(shù): 49/76頁
文件大?。?/td> 1211K
代理商: ADUC831BS
REV. 0
ADuC831
–49–
MCO
I2CM
SFR
BITS
50ns GLITCH
REJECTION FILTER
HARDWARE I
2
C
(SLAVE ONLY)
Q3
Q4
SCLOCK
PIN
Q2
Q1
(OFF)
DV
DD
SPE = 0 (I
2
C ENABLE)
Figure 42. SCLOCK Pin I/O Functional Equivalent
in I
2
C Mode
HARDWARE SPI
(MASTER/SLAVE)
Q3
Q1
Q2 (OFF)
DV
DD
SDATA/
MOSI
PIN
Q4 (OFF)
SPE = 1 (SPI ENABLE)
Figure 43. SDATA/MOSI Pin I/O Functional Equivalent
in SPI Mode
Q3
Q4
Q2
Q1
(OFF)
DV
DD
MDI
MDO
MDE
I2CM
HARDWARE I
2
C
(SLAVE ONLY)
50ns GLITCH
REJECTION FILTER
SDATA/
MOSI
PIN
SFR
BITS
SPE = 0 (I
2
C ENABLE)
Figure 44. SDATA/MOSI Pin I/O Functional Equivalent
in I
2
C Mode
MISO is shared with P3.3 and as such has the same configuration
as shown in Figure 40.
Read-Modify-Write Instructions
Some 8051 instructions that read a port read the latch, and
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called “read-modify-
write” instructions. Listed below are the read-modify-write
instructions. When the destination operand is a port, or a port
bit, these instructions read the latch rather than the pin.
ANL
(Logical AND, e.g., ANL P1, A)
ORL
(Logical OR, e.g., ORL P2, A)
XRL
(Logical EX-OR, e.g., XRL P3, A)
JBC
(Jump if Bit = 1 and Clear Bit, e.g., JBC P1.1,
LABEL)
CPL
(Complement Bit, e.g., CPL P3.0)
INC
(Increment, e.g., INC P2)
DEC
(Decrement, e.g., DEC P2)
DJNZ
(Decrement and Jump if Not Zero, e.g.,
DJNZ P3, LABEL)
MOV PX.Y, C
*
(Move Carry to Bit Y of Port X)
CLR PX.Y
*
(Clear Bit Y of Port X)
SETB PX.Y
*
(Set Bit Y of Port X)
The reason that read-modify-write instructions are directed to the
latch rather than the pin is to avoid a possible misinterpretation of
the voltage level of a pin. For example, a port pin might be used to
drive the base of a transistor. When a 1 is written to the bit, the
transistor is turned on. If the CPU then reads the same port bit at
the pin rather than the latch, it will read the base voltage of the
transistor and interpret it as a logic 0. Reading the latch rather than
the pin will return the correct value of 1.
*
These instructions read the port byte (all 8 bits), modify the addressed bit, and
then write the new byte back to the latch.
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