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參數(shù)資料
| 型號： | ADUC831BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Circular Connector; No. of Contacts:6; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:9; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:9-35 |
| 中文描述： | 8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FRAME, CSP-56 |
| 文件頁數(shù)： | 57/76頁 |
| 文件大?。?/td> | 1211K |
| 代理商： | ADUC831BCP |
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REV. 0
ADuC831
–57–
Timer 1 Generated Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates
in Modes 1 and 3 are determined by the Timer 1 overflow rate
and the value of SMOD as follows:
Modes and Baud Rate =
(
/
) (Timer Overflow Rate)
2
32
SMOD
1
3
1
The Timer 1 interrupt should be disabled in this application. The
Timer itself can be configured for either timer or counter opera-
tion, and in any of its three running modes. In the most typical
application, it is configured for timer operation in the Autoreload
mode (high nibble of TMOD = 0010 binary). In that case, the baud
rate is given by the formula:
Modes and Baud Rate=
SMOD
(
) (
2
32
/
Core Clock/(
–TH
[
]))
1
12
256
×
Table XXIV shows some commonly used baud rates and how they
might be calculated from a core clock frequency of 11.0592 MHz
and 12 MHz. Generally speaking, a 5% error is tolerable using
asynchronous (start/stop) communications.
Table XXIV. Commonly-Used Baud Rates, Timer 1
Core
CLK
(MHz)
Ideal
Baud
SMOD
Value
TH1-Reload
Value
Actual
Baud
%
Error
9600
19200
9600
2400
12
11.0592
11.0592
11.0592
1
1
0
0
–7
–3
–3
–12 (F4H)
(F9H)
(FDH)
(FDH)
8929
19200
9600
2400
7
0
0
0
Timer 2 Generated Baud Rates
Baud rates can also be generated using Timer 2. Using Timer 2 is
similar to using Timer 1 in that the timer must overflow 16 times
before a bit is transmitted/received. Because Timer 2 has a 16-bit
Autoreload mode, a wider range of baud rates is possible using
Timer 2.
1
3
Modes and Baud Rate=(1 16
Therefore, when Timer 2 is used to generate baud rates, the timer
increments every two clock cycles and not every core machine
cycle as before. Thus, it increments six times faster than Timer 1,
and therefore baud rates six times faster are possible. Because
Timer 2 has 16-bit autoreload capability, very low baud rates are
still possible.
Timer 2 is selected as the baud rate generator by setting the TCLK
and/or RCLK in T2CON. The baud rates for transmit and receive
can be simultaneously different. Setting RCLK and/or TCLK puts
Timer 2 into its baud rate generator mode as shown in Figure 53.
In this case, the baud rate is given by the formula:
Modes 1 and 3 Baud Rate =
(Core Clk)/(
– RCAP H, RCAP L
32
65536
×
[
) (Timer Overflow Rate)
2
2
2
(
)])
Table XXV shows some commonly used baud rates and how they
might be calculated from a core clock frequency of 11.0592MHz
and 12 MHz.
Table XXV. Commonly Used Baud Rates, Timer 2
Core
CLK
(MHz)
Ideal
Baud
RCAP2H
Value
RCAP2L
Value
Actual %
Baud
Error
19200
9600
2400
1200
19200
9600
2400
1200
12
12
12
12
11.0592
11.0592
11.0592
11.0592
–1 (FFH)
–1 (FFH)
–1 (FFH)
–2 (FEH)
–1 (FFH)
–1 (FFH)
–1 (FFH)
–2 (FFH)
–20
–41
–164 (5CH)
–72
(B8H)
–18
(EEH)
–36
(DCH)
–144 (70H)
–32
(E0H)
(ECH)
(D7H)
19661
9591
2398
1199
19200
9600
2400
1200
2.4
0.1
0.1
0.1
0
0
0
0
CORE
CLK
2
T2
PIN
TR2
CONTROL
TL2
(8 BITS)
TH2
(8 BITS)
RELOAD
EXEN2
CONTROL
T2EX
PIN
TRANSITION
DETECTOR
EXF 2
TIMER 2
INTERRUPT
NOTE: AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
RCAP2L
RCAP2H
TIMER 2
OVERFLOW
2
16
16
RCLK
TCLK
RX
CLOCK
TX
CLOCK
0
0
1
1
1
0
SMOD
TIMER 1
OVERFLOW
C/
T2
= 0
C/
T2
= 1
NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12.
Figure 53. Timer 2, UART Baud Rates
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