參數(shù)資料
型號： ADSP-BF548BBCZ-5A
廠商： Analog Devices Inc
文件頁數(shù)： 33/100頁
文件大小： 0K
描述： IC DSP 16BIT 533MHZ 400CSBGA
產(chǎn)品培訓(xùn)模塊： Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標(biāo)準(zhǔn)包裝： 1
系列： Blackfin®
類型： 定點(diǎn)
接口： CAN，SPI，SSP，TWI，UART，USB
時鐘速率： 533MHz
非易失內(nèi)存： 外部
芯片上RAM： 260kB
電壓 - 輸入/輸出： 2.50V，3.30V
電壓 - 核心： 1.25V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 400-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 400-CSPBGA（17x17）
包裝： 托盤
配用： ADSP-3PARCBF548M01-ND - MODULE BOARD BF548
ADSP-3PARCBF548E02-ND - KIT DEV STARTER BF548
ADZS-BF548-EZLITE-ND - KIT EZLITE ADZS-BF548
Rev. C
|
Page 38 of 100
|
February 2010
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Total power dissipation has two components:
Static, including leakage current
Dynamic, due to transistor switching characteristics
Many operating conditions can also affect power dissipation,
including temperature, voltage, operating frequency, and pro-
cessor activity. Electrical Characteristics on Page 36 shows the
current dissipation for internal circuitry (VDDINT). IDDDEEPSLEEP
specifies static power dissipation as a function of voltage
(VDDINT) and temperature (see Table 17 and Table 18), and
IDDINT specifies the total power specification for the listed test
conditions, including the dynamic component as a function of
voltage (VDDINT) and frequency (Table 20).
There are two parts to the dynamic component. The first part is
due to transistor switching in the core clock (CCLK) domain.
This part is subject to an activity scaling factor (ASF) which rep-
resents application code running on the processor core and
L1/L2 memories (Table 19). The ASF is combined with the
CCLK frequency and VDDINT dependent data in Table 20 to cal-
culate this part. The second part is due to transistor switching in
the system clock (SCLK) domain, which is included in the IDDINT
specification equation.
13See the ADSP-BF54x Blackfin Processor Hardware Reference Manual for definition of sleep, deep sleep, and hibernate operating modes.
14Includes current on V
DDEXT, VDDUSB, VDDVR, and VDDDDR supplies. Clock inputs are tied high or low.
15Guaranteed maximum specifications.
16Unit for VDDINT is V (volts). Unit for fSCLK is MHz. Example: 1.2 V, 133 MHz would be 0.77 × 1.2 × 133 = 122.9 mA added to IDDDEEPSLEEP.
17See Table 19 for the list of I
DDINT power vectors covered.
Table 17. Static Current—Nonautomotive 400 MHz Speed Grade Devices (mA)1
Voltage (VDDINT)
2
TJ (°C)
0.90 V
0.95 V
1.00 V
1.05 V
1.10 V
1.15 V
1.20 V
1.25 V
1.30 V
1.35 V
1.38 V
1.40 V
1.43 V
-40
11.9
13.5
15.5
17.7
20.3
23.3
26.8
30.6
35.0
39.9
43.2
45.5
49.5
0
20.1
22.3
24.7
27.8
31.1
34.9
39.3
44.2
49.6
55.7
59.8
62.5
67.2
25
31.2
34.2
37.5
41.3
45.6
50.3
55.7
61.7
68.2
75.4
80.3
83.6
88.6
45
47.0
51.0
55.5
60.6
66.0
72.0
78.8
86.1
94.2
102.9
108.9
112.8
118.2
55
58.6
63.1
68.3
74.1
80.3
87.1
94.9
103.0
112.0
122.0
128.4
132.8
140.0
70
80.7
86.6
93.0
100.2
108.1
116.7
125.9
136.0
146.8
158.7
166.4
171.6
179.5
85
107.0
114.3
122.5
131.5
141.2
151.7
163.1
175.3
188.5
202.7
211.8
218.0
226.7
100
153.9
163.0
173.3
184.8
197.0
210.0
224.1
239.0
255.1
272.4
283.4
290.8
300.6
105
171.7
181.5
192.7
205.1
218.3
232.4
247.5
263.6
280.9
299.3
308.7
314.9
325.7
1 Values are guaranteed maximum IDDDEEPSLEEP for nonautomotive 400 MHz speed-grade devices.
2 Valid temperature and voltage ranges are model-specific. See Operating Conditions on Page 34.
Table 18. Static Current—Automotive 400 MHz and All 533 MHz/600 MHz Speed Grade Devices (mA)1
TJ (°C)
2
Voltage (VDDINT)
0.90 V
0.95 V
1.00 V
1.05 V
1.10 V
1.15 V
1.20 V
1.25 V
1.30 V
1.35 V
1.38 V
1.40 V
1.43 V
-40
19.7
22.1
24.8
27.9
31.4
35.4
39.9
45.0
50.6
57.0
61.2
64.0
70.4
0
45.2
49.9
55.2
61.3
67.9
75.3
83.5
92.6
102.6
113.6
121.0
125.8
135.0
25
80.0
87.5
96.2
105.8
116.4
127.9
140.4
154.1
169.2
185.4
196.1
203.3
218.0
45
124.2
134.8
147.1
160.7
175.3
191.2
208.6
227.3
247.6
269.6
284.0
293.6
312.0
55
154.6
167.2
181.7
197.7
214.9
233.8
254.2
276.1
299.7
325.9
343.1
354.6
374.0
70
209.8
225.6
243.9
264.1
285.8
309.4
334.8
363.5
394.3
427.7
449.4
463.9
489.0
85
281.8
301.3
323.5
350.2
378.5
408.9
442.1
477.9
516.5
557.5
584.2
602.0
629.0
100
366.5
390.5
419.4
452.1
486.9
524.4
564.8
608.2
654.8
704.7
737.0
758.5
793.0
105
403.8
428.3
459.5
494.3
531.7
571.9
614.9
661.5
711.1
763.9
798.5
821.6
864.0
1 Values are guaranteed maximum IDDDEEPSLEEP for automotive 400 MHz and all 533 MHz and 600 MHz speed grade devices.
2 Valid temperature and voltage ranges are model-specific. See Operating Conditions on Page 34.
相關(guān)PDF資料
PDF描述
ACM36DRKS CONN EDGECARD 72POS DIP .156 SLD
XC2C256-6FTG256C IC CR-II CPLD 256MCELL 256-FTBGA
ABM36DRKS CONN EDGECARD 72POS DIP .156 SLD
TAP685M035SRW CAP TANT 6.8UF 35V 20% RADIAL
VE-B1T-CX-B1 CONVERTER MOD DC/DC 6.5V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-BF548BBCZ-5AA 功能描述:IC DSP 16BIT 533MHZ 400CSBGA 制造商:analog devices inc. 系列:Blackfin? 包裝:托盤 零件狀態(tài):有效 類型:定點(diǎn) 接口:CAN，SPI，SSP，TWI，UART，USB 時鐘速率:533MHz 非易失性存儲器:外部 片載 RAM:260kB 電壓 - I/O:2.50V，3.30V 電壓 - 內(nèi)核:1.25V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:400-LFBGA，CSPBGA 供應(yīng)商器件封裝:400-CSPBGA（17x17） 標(biāo)準(zhǔn)包裝:1
ADSP-BF548BBCZ-5X 制造商:Analog Devices 功能描述:- Trays
ADSP-BF548MBBCZ-5M 功能描述:IC DSP 533MHZ W/DDR 400CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-BF549BBCZ 制造商:Analog Devices 功能描述:
ADSP-BF549BBCZ-ENG 制造商:Analog Devices 功能描述:- Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*