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參數(shù)資料
| 型號： | ADSP-BF533SBBZ500 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Blackfin Embedded Processor |
| 中文描述： | 16-BIT, 40 MHz, OTHER DSP, PBGA169 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-034AAG-2, BGA-169 |
| 文件頁數(shù)： | 16/56頁 |
| 文件大?。?/td> | 671K |
| 代理商： | ADSP-BF533SBBZ500 |
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Rev. 0
|
Page 16 of 56
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March 2004
ADSP-BF531/ADSP-BF532/ADSP-BF533
PIN DESCRIPTIONS
ADSP-BF531/2/3 processor pin definitions are listed in
Table 9
.
All pins are three-stated during and immediately after reset,
except the Memory Interface, Asynchronous Memory Control,
and Synchronous Memory Control pins, which are driven high.
If BR is active, then the memory pins are also three-stated. All
unused I/O pins have their input buffers disabled with the
exception of the pins that need pullups or pulldowns as noted in
the table footnotes.
In order to maintain maximum functionality and reduce pack-
age size and pin count, some pins have dual, multiplexed
functionality. In cases where pin functionality is reconfigurable,
the default state is shown in plain text, while alternate function-
ality is shown in italics.
Table 9. Pin Descriptions
Pin Name
Memory Interface
ADDR19–1
DATA15–0
ABE1–0/SDQM1–0
BR
3
BG
BGH
Asynchronous Memory Control
AMS3–0
ARDY
AOE
ARE
AWE
Synchronous Memory Control
SRAS
SCAS
SWE
SCKE
CLKOUT
SA10
SMS
Timers
TMR0
TMR1/
PPI_FS1
TMR2/
PPI_FS2
I/O Function
Driver Type
1
O
I/O Data Bus for Async/Sync Access
O
Byte Enables/Data Masks for Async/Sync Access
I
Bus Request
O
Bus Grant
O
Bus Grant Hang
Address Bus for Async/Sync Access
A
2
A
2
A
2
A
2
A
2
O
I
O
O
O
Bank Select
Hardware Ready Control
Output Enable
Read Enable
Write Enable
A
2
A
2
A
2
A
2
O
O
O
O
O
O
O
Row Address Strobe
Column Address Strobe
Write Enable
Clock Enable
Clock Output
A10 Pin
Bank Select
A
2
A
2
A
2
A
2
B
4
A
2
A
2
I/O Timer 0
I/O Timer 1/
PPI Frame Sync1
I/O Timer 2/
PPI Frame Sync2
C
5
C
5
C
5
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| ADSP-BF533SKBC600 | Blackfin Embedded Processor |
| ADSP-BF561SKBCZ600 | Blackfin Embedded Symmetric Multi-Processor |
| ADSP-BF561SKBCZ500 | Blackfin Embedded Symmetric Multi-Processor |
| ADSP-BF561 | Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear 16-PDIP 0 to 70 |
| ADSP-BF561SBB500 | Blackfin Embedded Symmetric Multi-Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-BF533SBBZ500X | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SBST400 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 400MHz 400MIPS 176-Pin LQFP |
| ADSP-BF533SBSTZ400 | 功能描述:IC DSP CTLR 16BIT 400MHZ 176LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:Blackfin® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-BF533SKBC300X | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SKBC600 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 600MHz 600MIPS 160-Pin CSP-BGA |
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