參數(shù)資料
型號(hào): ADSP-BF533SBBZ500
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: Blackfin Embedded Processor
中文描述: 16-BIT, 40 MHz, OTHER DSP, PBGA169
封裝: ROHS COMPLIANT, PLASTIC, MO-034AAG-2, BGA-169
文件頁數(shù): 29/56頁
文件大?。?/td> 671K
代理商: ADSP-BF533SBBZ500
ADSP-BF531/ADSP-BF532/ADSP-BF533
Rev. 0
|
Page 29 of 56
|
March 2004
Table 25. Serial Ports—Enable and Three-State
Parameter
Switching Characteristics
t
DTENE
t
DDTTE
t
DTENI
t
DDTTI
1
Referenced to drive edge.
Min
Max
Unit
Data Enable Delay from External TSCLK
1
Data Disable Delay from External TSCLK
1
Data Enable Delay from Internal TSCLK
1
Data Disable Delay from Internal TSCLK
1
0
ns
ns
ns
ns
10.0
–2.0
3.0
Table 26. External Late Frame Sync
Parameter
Switching Characteristics
t
DDTLFSE
t
DTENLFSE
1
MCE = 1, TFS enable and TFS valid follow t
DDTENFS
and t
DDTLFSE
.
2
If external RFS/TFS setup to RSCLK/TSCLK > t
SCLKE
/2, then t
DDTLSCK
and t
DTENLSCK
apply; otherwise t
DDTLFSE
and t
DTENLFS
apply.
Min
Max
Unit
Data Delay from Late External TFS or External RFS with MCE = 1, MFD = 0
1, 2
Data Enable from late FS or MCE = 1, MFD = 0
1,2
10.0
ns
ns
0
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