- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19398 > ADSP-21478KBCZ-1A (Analog Devices Inc)IC DSP SHARC 200MHZ LP 196CSPBGA PDF資料下載
參數(shù)資料
| 型號： | ADSP-21478KBCZ-1A |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/72頁 |
| 文件大小： | 0K |
| 描述： | IC DSP SHARC 200MHZ LP 196CSPBGA |
| 標準包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點 |
| 接口： | DAI，DPI，EBI/EMI，I²C，SPI，SPORT，UART/USART |
| 時鐘速率： | 200MHz |
| 非易失內(nèi)存： | ROM（4Mb） |
| 芯片上RAM： | 3Mb |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.20V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 196-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 196-CSPBGA（12x12） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
Rev. A
|
Page 16 of 72
|
September 2011
MLBCLK
I
Media Local Bus Clock. This clock is generated by the MLB controller that is
synchronized to the MOST network and provides the timing for the entire MLB
interface at 49.152 MHz at FS = 48 kHz. When the MLB controller is not used, this
pin should be grounded.
MLBDAT
I/O/T in 3 pin
mode. I in 5 pin
mode.
High-Z
Media Local Bus Data. The MLBDAT line is driven by the transmitting MLB device
and is received by all other MLB devices including the MLB controller. The
MLBDAT line carries the actual data. In 5-pin MLB mode, this pin is an input only.
When the MLB controller is not used, this pin should be grounded.
MLBSIG
I/O/T in 3 pin
mode. I in 5 pin
mode
High-Z
Media Local Bus Signal. This is a multiplexed signal which carries the
Channel/Address generated by the MLB Controller, as well as the Command and
RxStatus bytes from MLB devices. In 5-pin mode, this pin is input only. When the
MLB controller is not used, this pin should be grounded.
MLBDO
O/T
High-Z
Media Local Bus Data Output (in 5 Pin Mode). This pin is used only in 5-pin MLB
mode and serves as the output data pin. When the MLB controller is not used, this
pin should be grounded.
MLBSO
O/T
High-Z
Media Local Bus Signal Output (in 5 Pin Mode). This pin is used only in 5-pin
MLB mode and serves as the output signal pin. When the MLB controller is not
used, this pin should be grounded.
SR_SCLK
I (ipu)
Shift Register Serial Clock. (Active high, rising edge sensitive)
SR_CLR
I (ipu)
Shift Register Reset. (Active low)
SR_SDI
I (ipu)
Shift Register Serial Data Input.
SR_SDO
O (ipu)
Driven Low
Shift Register Serial Data Output.
SR_LAT
I (ipu)
Shift Register Latch Clock Input. (Active high, rising edge sensitive)
SR_LDO17–0
O/T (ipu)
High-Z
Shift Register Parallel Data Output.
RTXI
I
RTC Crystal Input. If RTC is not used, then the bits RTCPDN and RTC_READENB of
RTC_INIT register must be set to 1.
RTXO
O
RTC Crystal Output.
RTCLKOUT
O (ipd)
RTC Clock Output. For calibration purposes. The clock runs at 1 Hz.
TDI
I (ipu)
Test Data Input (JTAG). Provides serial data for the boundary scan logic.
TDO
O/T
High-Z
Test Data Output (JTAG). Serial scan output of the boundary scan path.
TMS
I (ipu)
Test Mode Select (JTAG). Used to control the test state machine.
TCK
I
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted
(pulsed low) after power-up or held low for proper operation of the device.
TRST
I (ipu)
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed
low) after power-up or held low for proper operation of the processor.
EMU
O/D (ipu)
High-Z
Emulation Status. Must be connected to the Analog Devices DSP Tools product
line of JTAG emulators target board connector only.
Table 10. Pin Descriptions (Continued)
Name
Type
State During/
After Reset
Description
The following symbols appear in the Type column of Table 10: A = asynchronous, I = input, O = output, S = synchronous, A/D = active drive,
O/D = open drain, and T = three-state, ipd = internal pull-down resistor, ipu = internal pull-up resistor.
The internal pull-up (ipu) and internal pull-down (ipd) resistors are designed to hold the internal path from the pins at the expected logic
levels. To pull-up or pull-down the external pads to the expected logic levels, use external resistors. Internal pull-up/pull-down resistors
cannot be enabled/disabled and the value of these resistors cannot be programmed. The range of an ipu resistor can be 26 kΩ to 63 kΩ. The
range of an ipd resistor can be 31 kΩ to 85 kΩ. The three-state voltage of ipu pads will not reach to full the VDD_EXT level; at typical conditions
the voltage is in the range of 2.3 V to 2.7 V.
In this table, all pins are LVTTL compliant with the exception of the thermal diode, shift register, and real-time clock (RTC) pins.
Not all pins are available in the 100-lead LQFP package. For more information, see Table 2 on Page 3 and Table 59 on Page 64.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RW2-1215D/H2/SMD | CONV DC/DC 2W 9-18VIN +/-15VOUT |
| V24A3V3C200BL2 | CONVERTER MOD DC/DC 3.3V 200W |
| MAX6514UKP085+T | IC TEMP SWITCH SOT23-5 |
| GSC65DREF | CONN EDGECARD 130POS .100 EYELET |
| TAP476M010CRW | CAP TANT 47UF 10V 20% RADIAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-21478KBCZ-2A | 功能描述:IC DSP SHARK 266MHZ 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21478KBCZ-3A | 功能描述:IC DSP SHARK 300MHZ 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21478KCPZ-1A | 功能描述:IC DSP SHARK 200MHZ 88LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21478KSWZ-1A | 功能描述:IC DSP SHARC 200MHZ LP 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21478KSWZ-2A | 功能描述:IC DSP SHARC 266MHZ LP 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。