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參數(shù)資料
| 型號(hào)： | ADSP-21062LKS-133 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | ADSP-2106x SHARC DSP Microcomputer Family |
| 中文描述： | 48-BIT, 33.33 MHz, OTHER DSP, PQFP240 |
| 封裝： | MS-029GA, MQFP-240 |
| 文件頁數(shù)： | 7/48頁 |
| 文件大?。?/td> | 370K |
| 代理商： | ADSP-21062LKS-133 |
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ADSP-21062/ADSP-21062L
–7–
REV. C
IOP REGISTERS
NORMAL WORD ADDRESSING
0x0000 0000
0x0002 0000
0x0004 0000
0x0008 0000
0x0010 0000
0x0018 0000
0x0020 0000
0x0028 0000
0x0030 0000
0x0038 0000
INTERNAL
MEMORY
SPACE
0x003F FFFF
SHORT WORD ADDRESSING
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=010
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=001
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=011
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=100
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=101
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=110
BROADCAST WRITE
TO ALL
ADSP-2106xs
MULTIPROCESSOR
MEMORY SPACE
NORMAL WORD ADDRESSING: 32-BIT DATA WORDS
48-BIT INSTRUCTION WORDS
SHORT WORD ADDRESSING: 16-BIT DATA WORDS
MS
0
BANK 0
0x0040 0000
0xFFFF FFFF
BANK 1
BANK 2
DRAM
(OPTIONAL)
BANK 3
NONBANKED
MS
1
MS
2
MS
3
BANK SIZE IS
SELECTED BY
MSIZE BIT FIELD OF
SYSCON
REGISTER.
EXTERNAL
MEMORY
SPACE
Figure 4. ADSP-21062/ADSP-21062L Memory Map
CBug and SHARCPAC are trademarks of Analog Devices, Inc.
EZ-LAB is a registered trademark of Analog Devices, Inc.
DEVELOPMENT TOOLS
The ADSP-21062 is supported with a complete set of software
and hardware development tools, including an EZ-ICE
In-
Circuit Emulator, EZ-LAB
development board, EZ-KIT, and
development software. The EZ-LAB contains an evaluation board
with an ADSP-21062 (5 V) processor and provides a serial connec-
tion to your PC. The SHARC
EZ-KIT combines the ADSP-
21000 Family Development Software for the PC and the
EZ-LAB
ADSP-21062’s
Development Board in one package.
The EZ-KIT contains in addition to the EZ-LAB development
board, an optimizing compiler, assembler, instruction level simu-
lator, run-time libraries, diagnostic utilities and a complete set
of example programs.
The same EZ-ICE hardware can be used for the ADSP-21060/
ADSP-21061, to fully emulate the ADSP-21062, with the excep-
tion of displaying and modifying the two new SPORTS registers.
The emulator will not display these two registers, but your
code can use them.
Analog Devices’ ADSP-21000 Family Development Software
includes an easy to use Assembler based on an algebraic syntax,
an Assembly Library/Librarian, a Linker, an Instruction-level
Simulator, an ANSI C optimizing Compiler, the CBug C
Source-Level Debugger, and a C Runtime Library including
DSP and mathematical functions. The Optimizing Compiler
includes Numerical C extensions based on the work of the
ANSI Numerical C Extensions Group. Numerical C provides
extensions to the C language for array selection, vector math
operations, complex data types, circular pointers, and variably
dimensioned arrays. The ADSP-21000 Family Development
Software is available for both the PC and Sun platforms.
The ADSP-21062 EZ-ICE
Emulator uses the IEEE 1149.1
JTAG test access port of the ADSP-21062 processor to monitor
and control the target board processor during emulation. The
EZ-ICE
provides full-speed emulation, allowing inspection and
modification of memory, registers, and processor stacks. Nonintru-
sive in-circuit emulation is assured by the use of the processor’s
JTAG interface—the emulator does not affect target system
loading or timing.
Further details and ordering information are available in the
ADSP-21000 Family Hardware & Software Development Tools
data sheet (ADDS-210xx-TOOLS). This data sheet can be
requested from any Analog Devices sales office, distributor or
the Literature Center.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the SHARC processor family. Hard-
ware tools include SHARC
PC plug-in cards, multiprocessor
SHARC
VME boards, and daughter card modules with multiple
SHARCs and additional memory. These modules are based on
the SHARCPAC
module specification. Third party software
tools include an Ada compiler, DSP libraries, operating systems,
and block diagram design tools.
ADDITIONAL INFORMATION
This data sheet provides a general overview of the ADSP-21062
architecture and functionality. For detailed information on the
ADSP-21000 Family core architecture and instruction set, refer
to the
ADSP-21062 SHARC
User’s Manual, Second Edition
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADSP-21062LKS-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21062LCS-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21062LAB-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21062KB-160 | ADSP-2106x SHARC DSP Microcomputer Family |
| ADSP-21062 | ADSP-2106x SHARC DSP Microcomputer Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-21062LKS-160 | 功能描述:IC DSP CONTROLLER 2MBIT 240MQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21062LKSZ-133 | 功能描述:IC DSP CONTROLLER 32BIT 240MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21062LKSZ-160 | 功能描述:IC DSP CONTROLLER 2MBIT 240MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21065 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-21065L | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
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