參數(shù)資料
型號(hào): ADSP-21062CS-160
廠商: ANALOG DEVICES INC
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: ADSP-2106x SHARC DSP Microcomputer Family
中文描述: 48-BIT, 40 MHz, OTHER DSP, PQFP240
封裝: MS-029GA, MQFP-240
文件頁(yè)數(shù): 12/48頁(yè)
文件大?。?/td> 370K
代理商: ADSP-21062CS-160
–12–
ADSP-21062/ADSP-21062L
REV. C
SYSTEM
CLKIN
EMU
5k
*
TDI
TDO
5k
*
TDI
EMU
TMS
TRST
TCK
TDO
CLKIN
*
OPEN DRAIN DRIVER OR EQUIVALENT, i.e.,
TDI
TDO
TDI
TDO
TDI
TDO
TDI
TDO
TDI
TDO
Figure 7. JTAG Clocktree for Multiple ADSP-2106x Systems
Figure 6 shows JTAG scan path connections for systems that
contain multiple ADSP-2106x processors.
Connecting CLKIN to Pin 4 of the EZ-ICE header is optional.
The emulator only uses CLKIN when directed to perform
operations such as starting, stopping, and single-stepping mul-
tiple ADSP-2106xs in a
synchronous
manner. If you do not need
these operations to occur synchronously on the multiple proces-
sors, simply tie Pin 4 of the EZ-ICE header to ground.
If synchronous multiprocessor operations are needed and
CLKIN is connected, clock skew between the multiple ADSP-
21062 processors and the CLKIN pin on the EZ-ICE header
must be minimal
. If the skew is too large, synchronous operations
may be off by one or more cycles between processors. For syn-
chronous multiprocessor operation TCK, TMS, CLKIN and
EMU
should be treated as critical signals in terms of skew,
and should be laid out as short as possible on your board. If
TCK, TMS, and CLKIN are driving a large number of ADSP-
21062s (more than eight) in your system, then treat them as a
“clock tree” using multiple drivers to minimize skew. (See
Figure 7 “JTAG Clock Tree” and “Clock Distribution” in the
“High Frequency Design Considerations” section of the
ADSP-
2106x User’s Manual, Second Edition
.)
If synchronous multiprocessor operations are not needed (i.e.,
CLKIN is not connected), just use appropriate parallel termi-
nation on TCK and TMS. TDI, TDO,
EMU
and
TRST
are
not critical signals in terms of skew.
For complete information on the SHARC EZ-ICE, see the
ADSP-21000 Family JTAG EZ-ICE User's Guide and Reference.
相關(guān)PDF資料
PDF描述
ADSP-21062KS-133 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21062KS-160 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21062LKS-133 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21062LKS-160 ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21062LCS-160 ADSP-2106x SHARC DSP Microcomputer Family
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ADSP-21062KBZ-160 功能描述:IC DSP CONTROLLER 32BIT 225BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)
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ADSP21062KS160 制造商:AD 功能描述:New