參數(shù)資料
型號(hào)： ADS-EVAL3
廠商： Electronic Theatre Controls, Inc.
元件分類： 串行ADC
英文描述： 16-Bit, 500kHz Sampling A/D Converters
中文描述： 16位，500kHz的采樣A / D轉(zhuǎn)換器
文件頁(yè)數(shù)： 5/8頁(yè)
文件大小： 603K
代理商： ADS-EVAL3
ADS -930
5
–9.999847
–9.999771
–8.750000
–7.500000
–5.000000
–4.999924
–2.500000
–1.250000
–0.000153
–0.000076
0.000000
1111 1111 1111 1111
LSB "1" to "0"
1110 0000 0000 0000
1100 0000 0000 0000
1000 0000 0000 0000
0111 1111 1111 1111
0100 0000 0000 0000
0010 0000 0000 0000
0000 0000 0000 0001
LSB "0" to "1"
0000 0000 0000 0000
COMP. OFF. BIN.
0000 0000 0000 0000
LSB "0" to "1"
0001 1111 1111 1111
0011 1111 1111 1111
0111 1111 1111 1111
1000 0000 0000 0000
1011 1111 1111 1111
1101 1111 1111 1111
1111 1111 1111 1110
LSB "1" to "0"
1111 1111 1111 1111
OFFSET BINARY
0111 1111 1111 1111
LSB "1" to "0"
0110 0000 0000 0000
0100 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
1100 0000 0000 0000
1010 0000 0000 0000
1000 0000 0000 0001
LSB "0" to "1"
1000 0000 0000 0000
COMP. TWO'S COMP.
1000 0000 0000 0000
LSB "0" to "1"
1001 1111 1111 1111
1011 1111 1111 1111
1111 1111 1111 1111
0000 0000 0000 0000
0011 1111 1111 1111
0101 1111 1111 1111
0111 1111 1111 1110
LSB "1" to "0"
01111111 1111 1111
TWO'S COMP.
+4.999847
+4.999771
+3.750000
+2.500000
0.000000
–0.000076
–2.500000
–3.750000
–4.999847
–4.999924
–5.000000
+FS –1 LSB
+FS –1 1/2 LSB
+3/4 FS
+1/2 FS
0
–1/2 LSB
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS + 1/2 LSB
–FS
–FS +1 LSB
–FS +1 1/2 LSB
–7/8 FS
–3/4 FS
–1/2FS
–1/2FS –1/2LSB
–1/4FS
–1/8FS
–1 LSB
–1/2LSB
0
UNIPOLAR
SCALE
INPUT
RANGE
0 to –10V
OUTPUT CODING
INPUT
RANGE
±5V
BIPOLAR
SCALE
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
STRAIGHT BIN
COMP. BINARY
Table 3b. Output Coding
CALIBRATION PROCEDURE
(Refer to Figure 2 and Tables 3a, and 3b)
Connect the converter per Table 2 for the appropriate input
voltage range. Any offset/gain calibration procedures should
not be implemented until the device is fully warmed up. To
avoid interaction, adjust offset before gain. The ranges of
adjustment for the circuits in Figure 2 are guaranteed to
compensate for the ADS-930's initial accuracy errors and may
not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This is accomplished by connecting
LED's to the digital outputs and performing adjustments until
certain LED's "flicker" equally between on and off. Other
approaches employ digital comparators or microcontrollers to
detect when the outputs change from one code to the next.
For the ADS-930, offset adjusting is normally accomplished
when the analog input is 0 minus LSB (–76μV). See Table
3b for the proper bipolar and unipolar output coding.
Gain adjusting is accomplished when the analog input is at
nominal full scale minus 1 LSB's (–9.999771V for unipolar
and +4.999771V for bipolar).
Note: Connect pin 5 to ANALOG GROUND (pin 4) for
operation without zero/offset adjustment. Connect
pin 6 to pin 4 for operation without gain adjustment.
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 17) so that the converter is continuously converting.
2. For unipolar or bipolar zero/offset adjust, apply –76.3μV to
the ANALOG INPUT (pin 3).
3. For a bipolar input - adjust the offset potentiometer until the
code flickers between 1000 0000 0000 0000 and 0111
1111 1111 1111 with pin 8 tied high (offset binary) or
between 0111 1111 1111 1111 and 1000 0000 0000 0000
with pin 8 tied low (complementary offset binary).
Figure 2. Bipolar Connection Diagram
Table 3a. Setting Output Coding Selection (Pin 8)
Straight Binary
Complementary Binary
Complementary Offset Binary
Offset Binary
Complementary Two’s Complement
(Using MSB, pin 40)
Two’s Complement
(Using MSB, pin 40)
1
0
0
1
0
1
OUTPUT FORMAT
PIN 8 LOGIC LEVEL
For a unipolar input - adjust the offset potentiometer until all
output bits are 0's and the LSB flickers between 0 and 1
with pin 8 tied high (straight binary) or until all output bits
are 1's and the LSB flickers between 0 and 1 with pin 8 tied
low (complementary binary).
4. Two's complement coding requires using BIT 1 (MSB) (pin
40). With pin 8 tied high, adjust the trimpot until the output
code flickers between all 0's and all 1's.
Table 2. Input Connections
0 to –10V
±5V
Pin 3
Pin 3
Pins 2 and 4
Pins 1 and 2
INPUT RANGE
INPUT PIN
TIE TOGETHER
ADS-930
20k
15
14
40
39
38
37
36
35
34
33
32
31
29
28
27
26
25
22
21
EOC
OVERFLOW
BIT 1 (MSB)
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14
BIT 15
BIT 16 (LSB)
ANALOG
DIGITAL
0.1μF
4.7μF
0.1μF
COMP. BITS
4.7μF
+10V REF. OUT
FIFO READ
16
18, 24
8
1
10
+5V
–15V
+15V
OFFSET
AGAIN
5
6
3
0.1μF
4.7μF
4, 11
13, 30
12
0.1μF
4.7μF
7
+
+
20k
–15V
+15V
–15V
+15V
17
START CONVERT
ANALOG INPUT
9 ENABLE
23 FIFO/DIR
19 FSTAT1
2 BIPOLAR
20 FSTAT2
+5V
+5V
+15V
–15V
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